- Jon T. Butler
-
Distinguished Professor
Mail Code: EC/Bu
Department of Electrical and Computer Engineering
Graduate School of Engineering and Applied Sciences
Monterey, CA 93943
Phone: 831-656-3299
Email: butler (at) nps.edu
Web: faculty.nps.edu/butler/
- EDUCATION:
-
PhD - Ohio State Univ, 1973
ME - Rensselaer Polytechnic Institute, 1967
BS - Rensselaer Polytechnic Institute, 1966
NPS EXPERIENCE:
- 1987 - present, Professor, Department of Electrical and Computer Engineering
- 1985 - 1987, NAVELEX Chair Professor
OTHER EXPERIENCE:
- 1997 - 1997 - (June - Sept) Visiting Foreign Professor, Kyushu Institute of Technology, Japan
- 1981 - 1982 - National Research Council Senior Postdoctorate Associate, Naval Postgraduate School, Monterey, CA
- 1974 - 1987 - Associate and Assistant Professor, Northwestern University, Evanston, Illinois.
- 1973 - 1974 - National Research Council Postdoctorate Associate, Air Force Avionics Laboratory, Wright-Patterson AFB, OH
TEACHING INTERESTS:
- Computer Architecture
- Logic Design
- Reconfigurable Computing
- Combinatorial Mathematics
- reconfigurable computing
RESEARCH INTERESTS:
- Numeric Function Generators
- Reconfigurable Computing
- Cryptographic Applications
- Longest Prefix Match Applications
- Multiple-Valued Logic
- reconfigurable computing
AWARDS:
- IEEE Third Millennium Medal, 2000
- Distinguished Service Award, IEEE Computer Society, 1996
- Japan Society for the Promotion of Science Fellow, 1995
- Distinctive Contributed Paper Award, Int'l Symposiium on Multiple-Valued Logic, 1995
- IEEE Fellow, 1989
- Meritorious Service Award, IEEE Computer Society 1987, 1992
- Outstanding Paper Award, Int'l Symposium on Multiple-Valued Logic, 1986
- Award for Excellence, Int'l Symposium on Multiple-Valued Logic, 1985
BOARDS/MEMBERSHIPS:
- Program Chairman, Reed-Muller Workshop, May 2009, Naha, Japan
- Editorial Board, Multiple-Valued Logic: An International Journal, 1996-present
- Member, IEEE Computer Society Publications Board, 1990-2000
- Chair, IEEE Computer Society Press Operations Committee, 1999-2000
- Member, Board of Governors, IEEE Computer Society,, 1990-1996
- Editor-in-Chief, IEEE Society Press Advances, 1992-1996
- Editor-in-Chief, Computer, 1990-1992
- Chair, IEEE Computer Society Transactions Operations Committee, 1998-1999
- Chair, Fellow Evaluation Committee, IEEE Computer Society, 1998-99
- Chair, IEEE Computer Society Magazine Operations Committee, 1987-1988
SELECTED PUBLICATIONS: (View an extended list)
- S. Nagayama, T. Sasao, and J. T. Butler, “Numerical function generators using bilinear interpolation,” 18th FPL (International Conference on Field Programmable Logic), September 8-10, 2008, Heidelberg, Germany.
- S. Nagayama, J. T. Butler, and T. Sasao, “Programmable numerical function generators for two-variable functions,” DSD 2008 (11th Euromicro Conference Digital System Design), September 3-5, 2008, University of Parma, Parma, Italy.
- S. Nagayama, T. Sasao, and J. T. Butler, “Design method for numerical function generators using recursive segmentation and EVBDDs,” IEICE Special Section on VLSI Design and CAD Algorithms, Vol. E90-A, No. 12, December 2007, pp. 2752-2761.
- S. Nagayama, T. Sasao, and J. T. Butler, “Design method of numerical function generators based on polynomial approximation for FPGA implementation,” 10th Euromicro Conference on Digital System Design, Architecture, Methods, and Tools (DSD 2007), August 27-31, 2007. Lübeck, Germany, pp. 280-287.
- T. Sasao, S. Nagayama, and J. T. Butler, “Numerical function generators using LUT cascades”, IEEE Transactions on Computers, vol. 56, No. 6, June 2007, pp. 826-838.
KEYWORDS/TECHNOLOGIES:
- Keywords: Numeric Function Generators, Reconfigurable Computing, Content-Addressable Memory, Binary Decision Diagrams, Longest Prefix Match (LPM)
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