NAVAL

POSTGRADUATE

SCHOOL

 

 

MONTEREY, CALIFORNIA

 

SUITABILITY OF THE SRC-6E RECONFIGURABLE COMPUTING SYSTEM

 FOR GENERATING FALSE RADAR IMAGES

 

 

by

 

Kendrick R. Macklin

 

June 2004

 

 

 

 Thesis Advisor:             Neil Rowe

 Second Reader:              Douglas Fouts


 

THESIS

 

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     REPORT DOCUMENTATION PAGE

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1. AGENCY USE ONLY (Leave blank)

 

2. REPORT DATE 

Jun 2003

3. REPORT TYPE AND DATES COVERED

Master’s Thesis

4. TITLE AND SUBTITLE:

Suitability of the SRC-6E Reconfigurable Computing Sytem for Generating False Radar Images

 

5. FUNDING NUMBERS

 

6. AUTHOR(S) Kendrick R. Macklin

7. PERFORMING ORGANIZATION NAME(S) AND ADDRESS(ES)

Naval Postgraduate School

Monterey, CA  93943-5000

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11. SUPPLEMENTARY NOTES  The views expressed in this thesis are those of the author and do not reflect the official policy or position of the Department of Defense or the U.S. Government.

12a. DISTRIBUTION / AVAILABILITY STATEMENT 

Approved for public release;  distribution is unlimited

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13. ABSTRACT (maximum 200 words)

This thesis evaluates the usefulness of the SRC-6E reconfigurable computing system, a particular kind of specialized computer, for the radar-signal processing application of generating false radar images.  It documents the process of creating and importing VHDL code to configure the user definable logic on the SRC-6E, building on previous work for the SRC-6E.  Data from alternative computational approaches to the same problem are compared to determine the effectiveness of a SRC-6E solution.  The results show that the SRC-6E provides no advantage until the task is made significantly complex; for this application, this was at greater than 64 range bins.  This supports the hypothesis that the algorithm requires too much initialization effort to take much advantage of the parallel processing and pipelining of the SRC-6E.  An evaluation of the SRC-6E difficulty of use is conducted, including a discussion of required skills, experience and development times.

 

 

 

 

14. SUBJECT TERMS 

Benchmark, Reconfigurable Computing, VHDL, SRC-6E, FPGA, False Radar Target Synthesis

15. NUMBER OF PAGES 246

 

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Approved for public release; distribution is unlimited

 

 

SUITABILITY OF THE SRC-6E RECONFIGURABLE COMPUTING SYSTEM

 FOR GENERATING FALSE RADAR IMAGES

 

Kendrick R. Macklin

Lieutenant, United States Navy

B.S., San Diego State University, 1997

M.S., Naval Postgraduate School, 2003

 

 

Submitted in partial fulfillment of the

requirements for the degree of

 

 

MASTER OF SCIENCE IN COMPUTER SCIENCE

 

from the

 

NAVAL POSTGRADUATE SCHOOL

June 2004

 

 

Markus Hey

 
 


Author:       Kendrick R. Macklin

 

 

 

Approved by:  Neil Rowe

Thesis Advisor

 

 

Douglas Fouts

Second Reader

 

 

Peter Denning

Chairman

Department of Computer Science

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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ABSTRACT

 

 

 

This thesis evaluates the usefulness of the SRC-6E reconfigurable computing system, a particular kind of specialized computer, for the radar-signal processing application of generating false radar images.  It documents the process of creating and importing VHDL code to configure the user definable logic on the SRC-6E, building on previous work for the SRC-6E.  Data from alternative computational approaches to the same problem are compared to determine the effectiveness of a SRC-6E solution.  The results show that the SRC-6E provides no advantage until the task is made significantly complex; for this application, this was at greater than 64 range bins.  This supports the hypothesis that the algorithm requires too much initialization effort to take much advantage of the parallel processing and pipelining of the SRC-6E.  An evaluation of the SRC-6E difficulty of use is conducted, including a discussion of required skills, experience and development times.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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TABLE OF CONTENTS

 

 

 

I.       Introduction and summary of research................. 1

A.       purpose......................................... 1

B.       summary of research............................. 1

C.       Remaining chapter outline....................... 5

II.     background and previous work......................... 7

A.       introduction.................................... 7

B.       False target Radar imaging algorithm............ 7

C.       False-target radar-imaging chip design.......... 8

D.       false-target radar-imaging program design...... 11

E.       benefit and cost of pipelining algorithms...... 13

1.       Background................................. 13

2.       Pipeline Benefits.......................... 14

3.       Pipeline Costs............................. 14

F.       summary of new research........................ 15

III.  SRC-6E architecture and software environment........ 17

A.       Introduction................................... 17

b.       SRC-6E hardware overview....................... 17

c.       software environment........................... 19

1.       Operating System........................... 19

2.       Programming Environment.................... 19

d.       major documentation............................ 20

1.       SRC-6E C Programming Environment Guide..... 20

2.       SRC-6E Fortran Programming Environment Guide 20

3.       SRC-6E MAP Hardware Guide.................. 20

4.       SRC-6E MAP Macro Developers Guide.......... 20

5.       Macro Data Sheet Library................... 21

iV.     Development and testing in vhdl with aldec active-hdl 5.2 23

A.       introduction................................... 23

B.       modifications to previous macro................ 23

1.       Overhead Reduction......................... 23

2.       PRB Signal................................. 23

3.       UNP Signal................................. 24

4.       URB Signal................................. 24

5.       Four Range Bins............................ 25

6.       Eight Range Bins........................... 25

7.       Sixteen Range Bins......................... 25

7.       64 Range Bins.............................. 25

8.       128 Range Bins............................. 26

9.       256 Range Bins............................. 26

V.       Porting the vhdl code to the src-6e................. 27

A.       introduction................................... 27

B.       the src-6e file types.......................... 27

1.       .info...................................... 27

2.       .box....................................... 27

3.       .mc........................................ 28

4.       .c......................................... 28

5.       makefile................................... 28

6.       .vhd....................................... 28

7.       Other Types................................ 28

C.       code development............................... 29

1.  Version 1.0................................ 29

2.  Version 1.1................................ 29

3.  Version 1.2................................ 30

4.  Version 2.0................................ 30

5.  Version 3.0................................ 31

d.       synthesizablity................................ 31

E.       FPGA Utilization............................... 31

vI.     Data collection and timing analysis................. 33

A.       introduction................................... 33

b.       benchmark test platforms....................... 33

1.       C Program Executed on a Windows-based Machine 33

2.       C Program Executed on the SRC-6E........... 33

3.       VHDL Code on the SRC-6E MAP................ 33

c.       timing data collection method.................. 34

d.       timing data analysis........................... 35

1.  Methods.................................... 35

2.  New Interface Timing Results............... 35

3.  4 Range Bin Timing Results................. 36

4.  8 and 16 Range Bin Timing Results.......... 38

5.  64 Range Bin Timing Results................ 40

6.  128 Range Bin Timing Results............... 40

7.  Conclusions................................ 41

VII.  conclusions......................................... 43

A.       introduction................................... 43

b.       difficulty of use.............................. 43

1.       Necessary Skills........................... 43

2.       Experience Level........................... 43

3.       Development Time........................... 44

c.       appropriateness of this algorithm for testing.. 44

D.       appropriateness of the SRC-6E for implementation 44

E.       recommendations for future work................ 45

1.       Develop Implementation of More Range Bins.. 45

2.       Develop a More User-Friendly Programming Environment.     46

3.       Testing Other Applications................. 46

appendix A............................................... 47

A.       chip2_sim.c.................................... 47

Appendix B............................................... 55

A.       4 Bin macro vhdl............................... 55

B.       8 Bin macro vhdl............................... 66

C.       16 Bin macro vhdl.............................. 68

D.       64 Bin macro vhdl.............................. 71

E.       128 Bin macro vhdl............................. 81

appendix c.............................................. 102

A.       4 Bin .box file............................... 102

B.       4 Bin .info file.............................. 102

C.       4 Bin .mc file................................ 102

D.       4 Bin .c file................................. 103

E.       8 Bin .box file............................... 107

F.       8 Bin .info file.............................. 107

G.       8 Bin .mc file................................ 107

H.       8 Bin .c file................................. 108

I.       16 Bin .box file.............................. 112

j.       16 Bin .info file............................. 112

k.       16 Bin .mc file............................... 113

l.       16 Bin .c file................................ 113

M.       64 Bin .box file.............................. 118

n.       64 Bin .info file............................. 119

o.       64 Bin .mc file............................... 119

p.       64 Bin .c file................................ 120

q.       128 Bin .box file............................. 124

r.       128 Bin .info file............................ 124

s.       128 Bin .mc file.............................. 124

t.       128 Bin .c file............................... 125

u.       example makefile (taken from 4 bins).......... 129

v.       example phase sample input file (32 inputs)... 130

w.       example range bin gain input file (4 bins).... 131

x.       example range bin phase rotation input file (4 bins) 131

11   131

y.       example screen output (4 bins with 32 inputs). 131

z.       example output data file (4 bins with 32 inputs) 132

appendix D.............................................. 135

A.       SRC-6E Macro data (4 bins).................... 135

B.       SRC-6E C program data (4 Bins)................ 149

C.       Windows C program data (4 bins)............... 151

d.       SRC-6E Macro data (8 bins).................... 152

e.       SRC-6E C program data (8 Bins)................ 167

f.       Windows C program data (8 bins)............... 169

g.       SRC-6E Macro data (16 bins)................... 170

h.       SRC-6E C program data (16 Bins)............... 185

i.       Windows C program data (16 bins).............. 186

j.       SRC-6E Macro data (64 bins)................... 188

k.       SRC-6E C program data (64 Bins)............... 203

l.       Windows C program data (64 bins).............. 204

m.       SRC-6E Macro data (128 bins).................. 206

n.       SRC-6E C program data (128 Bins).............. 220

0.       Windows C program data (128 bins)............. 222

list of references...................................... 225

INITIAL DISTRIBUTION LIST............................... 227

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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LIST OF FIGURES

 

 

 

Figure 1.. False Target Radar Imaging Algorithm Usage...... 7

Figure 2.. False Target Radar Image Chip Signal Flow....... 9

Figure 3.. Internal Design of the Control Logic........... 11

Figure 4.. Signal Flow for Four Cascaded Range Bins....... 12

Figure 5.. Speedup vs. Number of Range Bins............... 15

Figure 6.. SRC-6E System Diagram (After Ref. 4.).......... 17

Figure 7.. MAP Interface Block Diagram (From Ref. 4.)..... 18

Figure 8.. FPGA Usage..................................... 32

Figure 9.. Comparison of Average Total Time............... 35

Figure 10.Average Total Time (4 Bins).................... 36

Figure 11.Comparison of Average Time per Sample.......... 37

Figure 12.Average Time per Sample (4 Bins Semi-Log)...... 38

Figure 13.Average Total Time(8 Bins)..................... 39

Figure 14.Average Total Time(16 Bins).................... 39

Figure 15.Average Total Time(64 Bins).................... 40

Figure 16.Average Total Time(128 Bins)................... 41

 

 

 

 

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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LIST OF TABLES

 

 

 

Table 1.... False-Target Radar-Imaging Program Example Using Four Range Bins............................................... 12

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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ACKNOWLEDGEMENTS

 

 

 


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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I.  Introduction and summary of research

A.  purpose

The specific purpose of this research was to evaluate the performance, correctness, and ease of use of the SRC-6E reconfigurable computing system built by SRC Computers, Inc., for implementing false radar images.  The more general purpose was to aid in establishing a broad base of knowledge on what types of applications are appropriate for implementation on this type of machine.  The task of generating false radar images provides a readily available yet suitably complex algorithm for implementation on the SRC-6E.  The research builds on previous work [1].  The algorithm chosen was based on a custom chip design previously developed by a faculty/student research team at the Naval Postgraduate School which creates false target radar images.  A C language program, written by Professor Douglas Fouts, was also available to use as a standard for comparing the accuracy of results throughout the research.

B.  summary of research

Reconfigurable computing is defined as "the capability of reprogramming hardware to execute logic that is designed and optimized for a specific user’s algorithms" [2]. The SRC-6E reconfigurable computer is a Linux-based system consisting of two sides labeled A and B which each contain motherboards holding dual Intel P3 Xeon 1-GHz processors, 1.5 gigabytes of memory, and a SNAP interface card.  The SNAP card is a custom interface card which plugs into a motherboard DIMM memory slot and provides connections to the MAP board which is located in a third section of the system.  A single MAP board consists of two independent MAPs.  MAP, a registered trademark of SRC Computers, Inc., is the name for the custom hardware.  Each MAP consists of three Xilinx Virtex-II-series XC2V6000 FPGAs and 24 megabytes of memory.  One of the FPGAs [NCR1] is reserved for control logic while the other two, available for user programs, are called "user logic".  The memory is split into six equal banks, labeled A through F, of 4 megabytes each.  The user FPGAs are connected to a fixed 100-MHz clock.

     Code written in the hardware description languages Verilog and/or VHDL can be ported to the SRC-6E with only minor changes.  Several support files are required to help the code exploit the user logic.  These files primarily describe the interfaces to the code.  The algorithm selected for the research described here was written in VHDL and converted for use on the SRC-6E.

To evaluate the effectiveness of the SRC-6E, timing data was collected from several implementations of the false radar target algorithm.  The first implementation was the executable created on the SRC-6E which uses the reconfigurable user logic.  The second implementation was a C program which performed the same functionality as the VHDL code.  This code was compiled and executed on a 3-GHz Pentium 4 system, using 2 gigabytes of DIMM memory and the Windows XP Professional operating system.  The machine used was the same one as the previous implementation to allow comparison of results.  The third implementation was the same C program running on the 1-GHz Xeon processor on a Linux based SRC-6E, but not using the MAP.  Several input data sets were used in testing.  Each data value consisted of a 5-bit number, written as two hexadecimal digits, which represented an intercepted radar signal.  Data sets containing 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16284, 32786, 65536, 131072, 262144, and 500000 data values were used.  Five timing runs were conducted for each data set on all three data sources.

The timing data shows the SRC-6E MAP execution time is extremely fast, even for very large data set sizes.  However, the total execution time for the SRC-6E VHDL macro takes considerably longer.  The extra time represents delays in the system to prepare and transfer the data in and out of the MAP which cause the SRC-6E execution time to be longer for most input set sizes, initially by an order of magnitude. Comparison of the MAP execution times for the previous 4-bin macro with the new 4-bin macro shows an improvement for large input set sizes, verifying that the new interface design is more efficient.

As input set size is increased the timing results begin to converge.  The overhead in the SRC VHDL macro clearly dominates the results for smaller sample set sizes.  However, for larger sample set sizes, the overhead time is amortized over the total time to be nearly insignificant.  The 64-bin model shows the SRC macro total execution time catching up to other benchmark platforms and would likely beat them if the sample set size could be further increased.  However, this is not possible with the current macro design due to the memory design of the SRC-6E hardware.  The 128-bin model shows the SRC macro total execution time beating all benchmark platforms after approximately 50,000 sample set size.

Programming the SRC-6E to use user-defined macros requires knowledge of high-level programming languages, hardware description languages, hardware component design, and synthesizability.  Relatively few people possess all of these skills to use the system effectively without first receiving significant training.  However, programming the system using only high-level languages of C or Fortran is possible which widens the potential user base to many more people.  More research needs to be performed to determine if either method produces more effective solutions.

The SRC-6E has a relatively steep learning curve.  There are a few examples in the documentation and a very small body of work in place using the system.  The errors generated by the system during development are not intuitive and cannot be solved without previous experience with solving the same errors.  There are no development tools in place to assist novice users in programming the system.  More research is required to see how much experience on the system is required to prevent and or recognize these types of errors quickly.

The development time to implement solutions on this system appears to be high, primarily due to the steep learning curve and lack of development tools.  More research must be performed to quantify the development time and see how it improves once a group of experienced repeat users is grown.  No research has yet been performed with large projects, employing multiple programmers, to see if the total project time can be reduced effectively.

Since it is pipelined and supports parallel processing, the chosen implementation of the false-target radar-imaging algorithm appears to be one that would benefit from a reconfigurable computer.  The current implementation has shown the hardware’s effectiveness for a highly parallel process with large input data sets.  However, the steep learning curve and high development time are unlikely to change until more user-friendly development tools are created for the system.

C.  Remaining chapter outline

The following outlines the remaining chapters which roughly follow the major steps that were taken throughout the research:

·                    Chapter II provides background information and review of previous research.

·                    Chapter III discusses the SRC-6E architecture, programming environment, and documentation.

·                    Chapter IV discusses modifications to the original VHDL macro programmed using VHDL.

·                    Chapter V discusses porting the VHDL code to SRC-6E environment.

·                    Chapter VI presents the data collection methods and analysis.

·                    Chapter VII provides conclusions and future work recommendations.

·                    Appendix A contains the modified C program originally written by Professor Douglas Fouts which was used a standard for output correctness and as a source of timing data.

·                    Appendix B contains the VHDL code for all range bin models.

·                    Appendix C contains the support files required to implement the VHDL code on the SRC-6E.

·                    Appendix D contains all of the timing data collected during the research.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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II. background and previous work

A.   introduction

This chapter discusses background information and reviews previous work, including the basics of the false radar imaging algorithm, the benefits and costs of pipelining the algorithm, use of the chip design and C program in both the current and previous research and gives an overview of the major steps taken to improve, expand and test the algorithm using the SRC-6E.  The algorithm used in the previous research was based on a custom chip design previously developed by a faculty/student research team at the Naval Postgraduate School which creates false target radar images.  The same C language program, originally written by Professor Douglas Fouts, was again used as a standard for comparing the accuracy of results throughout the research.

B.   False target Radar imaging algorithm

The algorithm works by splitting a false target image into several range bins, as shown in Figure 1, where a ship is split into four range bins.

                                     Figure 1.           False Target Radar Imaging Algorithm Usage

Each range bin represents a portion of the vessel based on the distance from the radar source.  Greater resolution can be achieved by having a greater number of range bins for a given false target.  It can be observed from the geometry that the radar-signal travel distance is different for each range bin. 

Based on knowledge of a ship’s radar image, an operator can set phase rotation and gain constants for each range bin. The algorithm begins with the interception and sampling of an interrogating radar pulse.  The sample phase is then rotated by adding a rotation constant to it.  Next, the sine and cosine are calculated.  The gain is then applied to the results by multiplying by a gain value.  The results of each range bin are then summed up to produce a radar reflection signal at a given time.  With proper use, the ship can be made to appear in a false position, be of a different type of target, or to appear to be traveling with other ships.

C.   False-target radar-imaging chip design

The false-target radar-imaging chip consists of a 6-stage pipeline which performs all necessary functions to create a false radar reflection for a single range bin.  Figure 2 shows the signal flow through the slightly simplified version as was implemented during the previous research.

                                       Figure 2.           False Target Radar Image Chip Signal Flow

The basic steps of the algorithm are performed as follows:

1.              The phase sample enters into register 3.

 

2.              The phase rotation value enters into register 1, is then loaded into register 2, and is then added to the phase sample at adder 1.  The results are then loaded into register 4.

 

3.   The contents of register 4 enter the lookup table (LUT) and Sine and Cosine results are calculated.  The remainder of the pipeline is split into two identical portions for each data result.  The following steps outline the path for the Sine result.

 

4.   The gain value enters at register 5, is then loaded to register 6, and proceeds to shifter 1 where it controls how the contents of register 7 are shifted before they proceed to register 9.  This accomplishes modulo-2 multiplication.

 

5.   The result from a preceding range bin enters at register 11 and is added to the contents of register 9 in adder 2 before proceeding to register 13.

 

6.   The contents of register 13 are now available as output Q if this is the last range bin in the series or are sent to register 11 of a following range bin.

The control logic block receives signals URB (use range bin), PSVin (phase sample valid input), and ODVin (output data valid input).  These signals are used to create the CLR13 (clear 13-bit register), CLR17 (clear 17-bit register), PSVout (phase sample valid output), and ODVout (output data valid output).

The internal design of the control logic is shown in Figure 3.  The CLR13 and CLR17 signals are used to clear the register contents at the appropriate time in the pipelines when they do not contain valid data.  This occurs during pipeline startup and shutdown.  The PSVout signal is present to show the DRFM signal is valid.  The ODVout signal is present to show that outputs Q and I contain valid data.  The URB signal is present to allow the operator to disable a range bin.  Figure 4 shows the signal flow when four range bins are connected together.

                                                    Figure 3.           Internal Design of the Control Logic

 

D.   false-target radar-imaging program design

The false-target radar-imaging program was written in the C language.  It performs the same arithmetic calculations as the false radar imaging chip but uses nested loop iterative structures instead of pipelines.  While the chip requires a separate pipeline for each range bin, the program simply adds additional length to the appropriate arrays, trading off memory utilization for computational logic.  Table 1 shows how the results of each of four range bins with an input of N samples are placed into the two dimensional array created by the program.  Each row of the table is then summed up to produce the false target radar signal results.

                                          Figure 4.           Signal Flow for Four Cascaded Range Bins

 

Bin 0

Bin 1

Bin 2

Bin 3

Sample 1 Results

0

0

0

Sample 2 Results

Sample 1 Results

0

0

Sample 3 Results

Sample 2 Results

Sample 1 Results

0

Sample 4 Results

Sample 3 Results

Sample 2 Results

Sample 1 Results

Sample N Results

Sample N-1 Results

Sample N-2 Results

Sample N-3 Results

0

Sample N Results

Sample N-1 Results

Sample N-2 Results

0

0

Sample N Results

Sample N-1 Results

0

0

0

Sample N Results

      Table 1.                         False-Target Radar-Imaging Program Example Using Four Range Bins

The program was used as both a trusted source for results to test the research against as well as used in the timing comparisons discussed in Chapter VI.  The full code for the program can be viewed in Appendix A.

E.   benefit and cost of pipelining algorithms

The implementation of the false-radar imaging-algorithm has each range bin’s function split over 5 pipeline stages.  The output of each range bin is then chained into the next in the final pipeline stage.  This section will discuss the benefits and costs of pipelining.

1.   Background

Pipelining allows work that involves repetition to be performed in parallel, reducing the total completion time.  It is most effective when the work can be separated into tasks of equal length.  However, in reality, work seldom splits into subtasks of equal length.  Since the completion time for each stage varies with the task it performs, some delay is required at the end of each stage, so that slower stages have time to complete their task before receiving new work.  Each of these tasks then becomes a pipeline stage where a portion of the total job is performed for each item passing through the pipeline.  Each stage receives a result from the previous stage, performs its task, and then passes the new result to the next stage.

For work that involves arithmetic functions performed by a computer, each pipeline stage consists of the logic to perform the subtask and a register which stores the result until the next stage is ready for it.  A clock performs coordination of the entire pipeline by allowing the registers to all fill at the same time.  The clock can only run as fast as the slowest pipeline stage.  The speed of each stage includes the time to complete the function as well as the delay time caused by the register itself.

2.   Pipeline Benefits

Pipelines have two major benefits.  First, as previously discussed, they allow multiple repetitive tasks to be performed in parallel which reduces the total completion time.  Second, pipelines can allow computer logic to run at a higher clock speed.  More complex logic functions require more time to complete.  When the total time required is longer than the desired clock speed, the function can be broken into smaller pieces and placed in a pipeline.

3.   Pipeline Costs

Since functions can rarely be broken into equal subtasks and pipeline registers introduce some delay, the total time to complete a function in a pipeline will always be longer than the time to do it once without a pipeline.  However, when the function must be repeated the pipeline can become efficient.  The point where the pipeline becomes efficient can begin no sooner than when the number of repetitions exceeds the number of stages.  Also, if the function is not split up into fairly equal subtasks and/or the register delay is high, the onset of pipeline efficiency can be delayed even further.  Pipeline speedup of a k-stage pipelined function over an equivalent non-pipelined function is defined as [3]:

, where n is the number of repetitions.

The implementation of the false-radar imaging-algorithm has each range bin’s function split over five pipeline stages.  The output of each range bin is then chained into the next in the final pipeline stage.  This creates a complete pipeline length of N+4, where N is the number of range bins implemented.   Figure 5 shows the pipeline speedup for the number of range bins implemented in this research, using N for k and number of samples for n.

                                                           Figure 5.           Speedup vs. Number of Range Bins.

 

The plots shows speedup increases as the number of samples is increased.  For n>>k, maximum speedup of k is achieved, meaning k tasks are efficiently performed at the same time.  For low n, the pipeline length is too long to be efficient.  This phenomenon can be viewed in the data presented in Chapter VI.

F.   summary of new research

Previous work implemented and tested four range bins.  For simplicity, the previous design passed all the range bin programming data with each new radar sample.  However, this was inefficient since the programming data does not change over a given set of radar samples.  For each 5-bit sample, 40 bits of repetitive programming data was reentered, (10 per range bin).  The interface to the MAP consists of 6 banks of 64-bits, of which at least one must be designated for output, leaving at most 320 bits for input.  With the expansion to 16 range bins, half of the input bandwidth would have been consumed by unnecessary, repetitive programming data and further expansion beyond 16 bins would be impossible within the provided bandwidth.  The current research implements 4-, 8-, 16-, 64- and 128-range bin versions using a new design which allows the programming data to be sent to the macro only once for each set of radar samples.

 

 

This chapter discussed background information and previous work.  The next chapter will discuss the hardware, software, and documentation, of the SRC-6E reconfigurable computing system.   

 

III. SRC-6E architecture and software environment

A.   Introduction

This chapter provides a brief overview of the hardware, software, and documentation, of the SRC-6E reconfigurable computing system.  Reconfigurable computing is defined as “the capability of reprogramming hardware to execute logic that is designed and optimized for a specific user’s algorithms” [2].

b.   SRC-6E hardware overview

The SRC-6E computer consists of two independent Linux computers (labeled A and B) and a MAP board, (see Figure 6).

                                                 Figure 6.           SRC-6E System Diagram (After Ref. 4.)

 

MAP, a registered trademark of SRC Computers, Inc., is the name of the custom reconfigurable hardware.  Each independent Linux computer contains a motherboard holding dual Intel P3 Xeon 1-GHz processors, 1.5 gigabytes of memory, and a SNAP interface card.  The SNAP card is a custom interface card which plugs into a motherboard DIMM memory slot and provides connections to the MAP board which is located in the MAP Chassis.  A single MAP board consists of two independent MAPs.  A block diagram of a single MAP is shown in Figure 7.  A MAP consists of three Xilinx Virtex-II-series XC2V6000 FPGAs and 24 megabytes of memory (labeled OBM on Figure 7).

                                     Figure 7.           MAP Interface Block Diagram (From Ref. 4.)

 

One of the FPGAs is reserved for “control logic” while the other two, available for user programs, are called “user logic”.  The OBM memory is split into six equal banks, labeled A through F, of 4 megabytes each.  The user FPGAs are connected to a fixed 100-MHz clock, which seems overly restrictive.  According to Xilinx product specification sheets, the Virtex-II-series FPGAs can ran at clock speeds as low as 1 MHz and upwards of 400 MHz [5].  Programmer control of the clock speed on the SRC-6E would make the system more flexible.  Each MAP also has a chain port which can be used for direct I/O to the user logic, but was not used during this research.

c.   software environment

1.   Operating System

The operating system for the SRC-6E is Red Hat Linux, which has been augmented with custom drivers and libraries to support the MAP and SNAP hardware.  The built-in graphical text editor in Linux is called GEdit.  Programmers experienced with UNIX can use the standard line type text editors such as VI if they choose.  Both contain the minimal functionality required of a text editor to write the required files for the SRC-6E. 

2.   Programming Environment

The programming environment for the SRC-6E is called Carte.  Carte allows a user to write code in a high level language, either C or Fortran, that directly targets the user programmable FPGAs in the MAP.  In addition, users can write their own “macros” using the hardware definition languages Verilog and/or VHDL.  At compile time, all user code and macros are linked together into a single executable file. Carte includes standard compilers for the Intel microprocessors as well as custom MAP compilers for both Fortran and C.  Synplify Pro software by Synplicity, Inc. is used for FPGA place and routing.  This program normally runs under Windows version but is executed in the Linux environment using a Windows emulator called Wine.

Since Carte relies on the built-in Linux editors, the SRC-6E programming environment does not have any of the modern features a programmer expects from editors available in products such as Microsoft’s Visual C++ or Borland’s J-Builder.  Lack of syntax and error checking in the programming environment is a serious drawback when using this system.  Some error messages are produced at compile time, but they are cryptic at best, especially for someone not used to the Linux environment.  There are several file types which must interact during the compile process, as will be discussed in Chapter V.  The intricate details of these files can be quite confusing and it is often difficult to identify which file contains the problem based on the error messages given at compile time.  Rudimentary checking of these files within a custom editor would greatly improve the entire programming process.

d.   major documentation

The documents discussed here come with the SRC-6E to aid in its programming.

1.   SRC-6E C Programming Environment Guide

Driver code must be developed to create the interface to the user logic.  This document describes how to write this code using the C language [6].

2.   SRC-6E Fortran Programming Environment Guide

Similar to the C Programming Environment Guide, this document describes how to write similar code using the Fortran language [7].

3.   SRC-6E MAP Hardware Guide

This document contains hardware implementation specifics of the MAP which are well below the level required for users to successfully program the SRC-6E [4].

4.   SRC-6E MAP Macro Developers Guide

This document discusses general information on the use of the Macro Data Sheet Library, including naming conventions, interfaces, fanout and combinatorial delays [8].

5.   Macro Data Sheet Library

The library contains data sheets for all macros developed by SRC for the SRC-6E.  A list of all currently supported macros is available in a technical note, Ref. 9.  The macros can be used like regular function calls in the chosen programming environment language (C or Fortran).  The macros include all basic math and logic functions currently supported by the environment.  There are also several support macros which include, among others, various macros for combining and splitting data structures.

 

 

This chapter provided an overview of the hardware, software and documentation of the SRC-6E computer.  The next chapter will discuss development and testing of the VHDL code used in the research.


 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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iV. Development and testing in vhdl with aldec active-hdl 5.2

A.   introduction

This chapter describes the development of the false-target radar-imaging macros in VHDL before they were ported to the SRC-6E environment.  The final code used to implement 4 range bins in the previous research was used as a starting point and is hereafter referred to as the “old macro”.  Development of the macros was performed in a Windows XP environment using Aldec Active-HDL 5.2 software.

B.   modifications to previous macro

The old macro used two 64-bit inputs and a single 64-bit output.  Assuming that a reduction in overhead would improve their efficiency, the new macros were developed to use only a single 64-bit input and output.  Other modifications included addition of the PRB and UNP signals and internal connections of the URB signal within the range bins.  4-, 8-, 16-, 64- and 128-range bin versions were created.  The code for this section can be viewed in Appendix B.

1.   Overhead Reduction

     To reduce the input bandwidth, it was necessary to send in the programming data only once for each set of radar samples.  This was accomplished by complete redesign of the interface with implementation of the PRB and UNP signals.  These signals were present in the original chip design but were not implemented in the old macro.

2.   PRB Signal

The PRB signal, which stands for “Program Range Bin,” was originally intended to signal a specific range bin to accept new programming.  As implemented in this interface, it signals the start of a programming sequence where four range bins are programmed per clock cycle until all are programmed.  Thus for the sixteen bin model it takes 4 clock cycles to program all range bins.  The PRB is delayed through a shift register which is appropriately sized for the number of range bins.  Each group of four range bins beyond the first requires a bit.  A three bit shift register is used for the 16 range bin macro, one bit for the 8 range bin macro, and no shift register is necessary for the 4 range bin macro.  All range bins are sent programming data at the same time, but the delayed PRB signal causes only the appropriate group of range bins to load the data.

3.   UNP Signal

     The UNP signal, which stands for “Use New Programming,” was originally intended to signal each range bin one at a time to begin using its new programming.  The UNP signal was not implemented in the old macro.  As implemented in the new macros, it signals all range bins to simultaneously use their new programming.  The UNP signal is normally low.  Taking the UNP signal high for one clock signals the macro to use the new programming data previously loaded by a PRB programming sequence.

4.   URB Signal

The old macro used a URB signal which stands for “Use Range Bin.”  Intended as a single bit for each range bin to signal the control logic as to whether or not to use a particular range bin, this signal is programmed during the PRB programming sequence.  When low, the output of a range bin is not included in the overall output.  The old macro assumed that all four range bins would be used and had this signal tied high.  The new macro designs have the URB signal internally connected to allow its full intended use.

 

5.   Four Range Bins

The code for four range bins was created by instancing the original single range bin code and creating a new, more efficient interface.  The signal flow of four range bins is shown in Figure 4.  The code was verified by comparing the output to the C program run on the same data set.  This model was created to draw a timing comparison between the old macro and the new design.  This will determine if the reduction in the interface has any affect on the overall timing.

6.   Eight Range Bins

A system with eight range bins was created by instancing eight of the single range bins previously tested.  The code was verified by comparing the output to the C program run on the same data set.  This model was developed as an intermediate size for collection of timing data.

7.   Sixteen Range Bins

A system with sixteen range bins was created by instancing sixteen of the single range bins with an appropriate interface.  The code was verified by comparing the output to the C program run on the same data set.  This model was the original goal of the new research.  Through reduction of the interface overhead by 1/3 and increase of the number of pipelines by a factor of 4, it was hoped that the SRC-6E would show an improvement in timing as compared to the other benchmarks.

7.   64 Range Bins

A system with 64 range bins was created by instancing 64 of the single range bins with an appropriate interface.  The code was verfied by comparing the output to the C program run on the same data set.  This model was developed because of the unexpectedly low chip usage by the previous models which will be discussed in the next chapter.

8.   128 Range Bins

A system with 128 range bins was created by instancing 128 of the single range bins with an appropriate interface.  The code was verified by comparing the output to the C program run on the same data set.  This model was developed after the 256 range bin model would not fit in the user logic area.

9.   256 Range Bins

A system with 256 range bins was created by instancing 256 of the single range bins with an appropriate interface.  The code was verified by comparing the output to the C program run on the same data set.  This model was developed in an attempt to determine an upper bound for how many range bins would fit within the user logic area.

 

 

This chapter discussed VHDL code development.  The next chapter will discuss porting the code to the SRC-6E.

V.  Porting the vhdl code to the src-6e

A.   introduction

This chapter discusses the porting of the VHDL code to the SRC-6E and the required support files.  Also discussed are changes that were required to the original code to make it compatible with the SRC-6E.

B.   the src-6e file types

The process of writing code to target the user logic requires several file types.  To import a user macro from either VHDL or Verilog, five files must be created: .info, .box, .mc, .c, and the makefile.  Using only the last three, one can write code that targets the user logic without using a user defined macro.  Examples of these file types can be viewed in Appendix C, which contains the final versions of all the files used.

1.   .info

This file type is required whenever a user macro is used.  It contains the following information:

·                    Macro name

·                    Macro type – stateful, external, and pipelined

·                    Latency – a number stating how many clock cycles before valid output is generated by the macro.

·                    List of inputs and outputs

The file type “.info” is a naming convention and is not required.  Any filename can be used as long as it matches that listed in the makefile.

2.   .box

This is another file type that is required only when using a user-defined macro.  It is a Verilog style description of the input and output variables of the macro.  The Verilog description is necessary for both VHDL and Verilog macros.  As with the .info type, the .box name is only by convention.

3.   .mc

This file type is C code written to target the user logic.  All code in this file will be implemented in hardware along with the user macro.  Using this file type, it is possible to write code for the hardware using only the high-level language C without using any user-defined macros defined with a hardware description language.

4.   .c

This file type is regular C code which provides the interface between the operating system and the hardware code defined in the .mc file.  Code implemented in this file is executed on the Xeon processors.

5.   makefile

This file is used by the command “make” when all the files are compiled and linked.  It contains all of the file names and paths used, as well as the desired final executable name.  Compiler flags and options can also be stated in this file.

6.   .vhd

This file type is for VHDL macro files.  In general, it is safest to merge multiple files into one.  However, it is possible to build with separate files as long as they are listed in the proper order in the makefile.  The compiler appears to be single pass so the files must be in the order they are used, with the lowest order file listed first.

7.   Other Types

Two other file types can be used by users programming the user logic:  .f, which is a Fortran file, and .v, which is a Verilog file.  These file types were not used during this research.

C.   code development

Porting of the macro code began with creation of the required support files previously mentioned.  Modifying the support files from the old macro was fairly simple.  Only the .c interface file required significant rewrite to match up with the new macro interface.  The code went through three major versions and several revisions.

1.  Version 1.0

The sixteen-range-bin VHDL code was imported to the SRC-6E.  The required support files were generated by modifying the old macro files to support the new design, this proved trivial compared to the long trial and error process reported in the previous research.  However, during the make process, the SRC-6E reported a final clock speed of 78.5 MHz, well below the required minimum of 100 MHz.  Without surprise due to the timing failure the generated executable did produce the proper output.  This version implemented the programming sequence using a finite state machine with four states using only the UNP signal to reset the state to zero.  While this version created the proper output with the Aldec software, it generated too much delay when implemented in hardware on the SRC-6E.

2.  Version 1.1

     An eight-range-bin version was created to reduce the macro complexity for troubleshooting.  After verification in Aldec of the proper output it was compiled on the SRC-6E.  This version reported a final clock speed of 84.6 MHz and also generated incorrect output.

 

 

3.  Version 1.2

A four-range-bin version was created to further reduce the macro complexity for troubleshooting.  After verification in Aldec of the proper output it was compiled on the SRC-6E.  This version reported a final clock speed of 85.1 MHz and also generated faulty output.  Since the old macro had generated proper four-range-bins output on the SRC-6E it was determined that the finite state machine method would not work on the SRC-6E, presumably due to the style of programming it and not failure of the SRC-6E.  After discussion with SRC technical support, the need for a simpler more direct way of implementing the interface became apparent.

4.  Version 2.0

Review of the actual functionality required by the state machine showed that the same tasks could be performed with simpler components.  Since the states were only transitioned in numerical order, one per clock, the same function could be performed with a counter.  Since the new version would require a significant redesign a review of the original chip design was conducted to see if the macro implementation could be brought closer to the original design.  During the review it was discovered that if the original PRB and UNP signals were implemented properly, a simple shift register could perform all of the necessary functions to direct the programming input as required.  The new design was implemented and verified in Aldec to produce the proper output.  After porting the new macro to the SRC-6E and modifying the .c file to support the new interface, the SRC-6E produced the proper sixteen-range-bin output for the first time.  Following the same basic design, new 8- and 4-range bin macros were rapidly created and verified.

5.  Version 3.0

After unexpectedly low FPGA usage for the 8- and 16-bin macros, only 12% and 16%, a 64-bin macro was implemented.  The new version demonstrated an FPGA usage of 38%.  A 256-bin version was then attempted but it would not fit within the user logic.  Finally, a 128-bin version was created which demonstrated a usage of 68%.

d.   synthesizablity

As noted in the original research, synthesizability was a problem during the design process.  Synthesizability is a style of hardware description language programming which allows the available layout tools to properly convert the code for hardware implementation on an FPGA.  During the design of the code, the Aldec software was only used to simulate the VHDL code.  Therefore, it only tested the code for functionality and did not consider if the code could actually be implemented in hardware.  Problems with the state machine design resulted in synthesizability problems which were resolved with a redesign of the interface.  The root cause of this was inexperience with both the VHDL language and the concept of synthesizability.

E.   FPGA Utilization

As previously noted, FPGA utilization was much lower than expected.  Based on the 4-bin’s 10% usage, slightly over 20% and 40% were expected for the 8 and 16 bin models, based on linear scaling of the number of additional pipelines implemented by the two larger models.  The 12% and 16% usages show that the Xilinx software is performing some unexpected and very effective optimization of the VHDL code which causes the actual usage to be much lower than the original estimations.  The 64- and 128-bin versions showed usage of 38% and 68%.  A 256-bin version was attempted but after 3 days of compiling failed with a usage of 99% with a little over 500 signals left to route.  Thus 256-bins almost fit within the user logic area.  However, it should be noted that this version had multiple timing failures resulting in a clock speed of only 32.8 MHz which would not have produced correct results.  Figure 8 is a plot of actual FGPA usage vs. the number of bins.  Two best fit plots, one exponential and one second order polynomial are added to predict the FPGA usage for macros with other numbers of bins.  The polynomial curve seems to most closely match the actual data. 

                                                                                                                     Figure 8.           FPGA Usage

 

This chapter discussed the necessary changes required to port the VHDL code to the SRC-6E environment.  The next chapter will discuss benchmarking the SRC-6E, including data collection and analysis.

 

vI. Data collection and timing analysis

A.   introduction

This chapter discusses the benchmarks and methods used for collection of data and its analysis during the research. 

b.   benchmark test platforms

1.   C Program Executed on a Windows-based Machine

The C program shown in Appendix A was compiled and executed on a 3-GHz Pentium 4 processor system with 2 gigabytes of RAM running the Windows XP Professional operating system.  The primary reason for this benchmark was to draw a comparison for cost-effectiveness between the high-cost special purpose SRC-6E system and a modern, off-the-shelf, general purpose computer.  The same computer that was used for the previous research was used to collect the new data.

2.   C Program Executed on the SRC-6E

The same C program was compiled and run directly on the SRC-6E without using any of the custom hardware.  Therefore, the data collected is based on the Linux operating system running on a 1-GHz Xeon 3 processor with 1.5 gigabytes of RAM.  Although the system contains dual processors, only one thread is created while running the code and therefore it is believed that only one processor is used during the test.  The primary reason for this benchmark was to test if the algorithm itself is suitable for implementation on the user-logic.

3.   VHDL Code on the SRC-6E MAP

The VHDL user macro and support files (shown in Appendix C) were built and executed on the SRC-6E MAP.  Two timing data results were collected from each of the runs, the total run time for the entire execution and the time of execution on the MAP only.  The two timing data results compare overhead time to actual execution on the MAP.

c.   timing data collection method

The data collection method used in this research was identical to the previous work to allow for direct comparison of the results.  The input data sets were composed to represent a stream of intercepted radar samples.  Each data item consists of two hexadecimal characters representing a five-bit intercepted radar sample.  The 32-sample-size data set is shown in Appendix C, which represents the decimal numbers 0 to 31 in order.  All other-sized sample sets were created by duplicating and repeating the same 32 samples in order. By doubling each previous sample set size the following set sizes were created: 32, 64, 128, 256, 512, 1,024, 2,048, 4,096, 8,192, 16,284, 32,786, 65,536, 131,072, and 262,144.  The final set size of 500,000 was chosen as a convenient, large value that was close to the upper array size restriction allowed by the four megabytes of memory per bank on the SRC-6E.

Data from all test platforms were collected in order of increasing input set size.  All raw data used in the timing analysis can be observed in Appendix D.  The timing data was collected by running five consecutive runs of each input data set on each of the three benchmark platforms.  The data for the Windows XP system were collected after a fresh reboot with all unnecessary programs closed.  As noted in the previous research, observation of the system usage during execution of the code again showed that the processor and memory were not fully used, never exceeding 54% usage during the 16-range-bin tests.  The reasons why the processor did not appear to be fully used and the methods Windows uses to measure performance are unknown.  The SRC-6E system data were collected by running the executables on side A when no other users were using the system.

d.   timing data analysis

1.  Methods

The timing data are displayed in two types of graphs for each range bin size.  The first is the average total time each test platform takes for each data set.  The average is taken of the five data points for each input set size.  The second is the average time per sample for each input set.  First, the average is taken over the five data points and then it is divided by the input set size.  All graphs are connected with straight line approximations between data points.

2.  New Interface Timing Results

Figure 9 shows the SRC MAP call average total time vs. input set size for each of the implemented range bin sizes.  

                                                              Figure 9.           Comparison of Average Total Time

The Old 4 Bins plot shows that the new macro interface is more efficient for large input set sizes.  The 4 Bins plot shows a spike at 1024 samples, caused by a single unusually large time result in the data.  The reason for this one slow result is unknown.

3.  4 Range Bin Timing Results

These results are very similar to those found in the previous research.

                                                                        Figure 10.        Average Total Time (4 Bins)

 

Figure 10 shows the average total time for 4 range bins.  All four curves are fairly constant up to the 16,284 sample size.  This result shows that, for small data set sizes, the overhead times inherent in the systems are much greater than the calculation times.  We consider overhead to be all the data file read/write operations and memory accesses required to prepare the data for calculations.  The SRC Macro MAP Call curve clearly shows the calculation time is insignificant compared to the total processing time.

The SRC Macro MAP Call curve also shows the MAP execution time is extremely fast, even for very large data set sizes.  However, the SRC Macro Total curve shows the total execution time for the VHDL macro takes considerably longer.  The extra time represents delays in the system to prepare and transfer the data in and out of the MAP which cause the SRC execution time to be longer for all input set sizes, initially by an order of magnitude.

As the input set size is increased, we see the curves begin to converge.  Figure 11 shows a comparison of the average time per sample.  Figure 12 shows the same data on a semi-log scale.

                                               Figure 11.        Comparison of Average Time per Sample

 

The overhead in the SRC Macro clearly dominates the graphs for smaller sample set sizes.  However, for larger sample set sizes, the overhead time is amortized over the total time to be nearly insignificant.  The SRC Macro Total time is approaching the other curves and presumably would eventually meet them if the sample set size could be further increased.  However, this is not possible with the current macro design due to the memory design of the SRC-6E hardware.

                                     Figure 12.        Average Time per Sample (4 Bins Semi-Log)

 

4.  8 and 16 Range Bin Timing Results

The results for 8 and 16 range bins are similar to 4 range bins.  Figure 13 shows the average total time for 8 range bins.  Figure 14 shows the average total time for 16 bins.  The macros still lack enough parallelism to be effectively implemented on the SRC.  However, it can be observed that the SRC macro time is remaining the same as it was for 4 range bins, while the C program implemented on the Windows XP and SRC are becoming slower.

                                                                          Figure 13.        Average Total Time(8 Bins)

 

                                                                        Figure 14.        Average Total Time(16 Bins)

5.  64 Range Bin Timing Results

Figure 15 shows the average total time for 64 bins.  For the first time, the SRC macro beats the SRC C program for all sample sizes, demonstrating that the macro implementation is more efficient than the Xeon processor running at 1 GHz.  At 500,000 inputs, the SRC macro also meets the Windows XP C program running at 3 GHz.  Therefore, 64 range bins marks the lower bound for range bin implementation that can be run efficiently on the SRC-6E.

                                                                        Figure 15.        Average Total Time(64 Bins)

 

6.  128 Range Bin Timing Results

Figure 16 shows the average total time for 128 bins.  The SRC macro beats the SRC C program again for all input sizes and by as much as an order of magnitude for large input sizes.  After approximately 50,000 inputs, the SRC macro beats the Windows XP C program.  This clearly demonstrates how a reconfigurable computer which allows the programming of highly specialized hardware for a given problem can be very efficient.

                                                                     Figure 16.        Average Total Time(128 Bins)

 

7.  Conclusions

The design of the VHDL macro running on the SRC-6E suffers from excessive overhead which makes it less efficient than the C program which performs the same calculations for implementations below 64 range bins.  Above 64 range bins the macro is very efficient, even beating a Windows XP computer running at a clock speed 30 times higher under certain conditions.

This chapter discussed benchmarking the SRC-6E, including collection of data and analysis, and drew conclusions on the results.  The next chapter draws conclusions on the SRC-6E, including difficulty of use and appropriateness for the chosen algorithm.  Recommendations for future work are also presented.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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VII. conclusions

A.   introduction

This chapter draws conclusions on the difficulty of use of the SRC-6E, appropriateness of the chosen algorithm for application on the SRC-6E, and gives recommendations for future work.

b.   difficulty of use

1.   Necessary Skills

Programming the SRC-6E to use user-defined macros requires knowledge of high-level programming languages, hardware description languages, hardware component design, and synthesizability.  Relatively few people possess all of these skills to use the system effectively without first receiving significant training.  However, programming the system using only high-level languages of C or Fortran is possible which widens the potential user base to many more people.  Much more research needs to be performed to determine if either method produces more effective solutions.

2.   Experience Level

The SRC-6E has a relatively steep learning curve.  There are a few examples in the documentation and a very small body of work in place using the system.  The errors generated by the system during development are not intuitive and cannot be solved without previous experience with solving the same errors.  The SRC support staff are very helpful in solving specific code problems but are not forthcoming in the reasons or methods used to resolve them.  There are no development tools in place to assist novice users in programming the system.  More research is required to see how much experience on the system is required to prevent and or recognize these types of errors quickly.

3.   Development Time

The development time to implement solutions on this system appears to be high, primarily due to the steep learning curve and lack of development tools.  This research represents approximately six months of part-time work by a single, moderately experienced person.  More research must be performed to further quantify the development time and see how it improves once a group of experienced repeat users is grown.  No research has yet been performed with large projects, employing multiple programmers, to see if the total project time can be reduced effectively.

c.   appropriateness of this algorithm for testing

The chosen implementation of the false target radar imaging algorithm appears to be one that would benefit from a reconfigurable computer because it is pipelined and supports parallel processing.  However, implementation of the design with 64 or less range bins has been shown to lack the necessary parallelism required to fully use the hardware and make it effective.  Without increases in the memory size allocated for the user logic, implementation below 64 range bins on the SRC-6E is not an effective solution in terms of development time, processing time, or cost-effectiveness.  Above 64 range bins the algorithm has the required parallelism to make implementation on the SRC-6E worthwhile.

D.   appropriateness of the SRC-6E for implementation

The SRC-6E user logic is tied to a permanent 100MHz clock which would limit the range resolution if it were used to implement an actual false target radar imaging system.  Range resolution is defined as [10]:

, where C is the speed of light, and  is the clock speed.  With a clock speed of 100 MHz range resolution is 1.5 meters.  Ref [10] reports a system would require at least a 500 MHz clock speed which results in a resolution of 0.3 meters necessary to fool modern radars.  Maximum target size is defined as [10]:

, where  is the number of range bins.

Using 128 range bins results in a maximum target size of 192 meters.  With an expected 200 range bins possible, 300 meters is achievable.  With the use of two user logic areas possible, over 400 range bins should be achievable, resulting in 600 meters.  Future versions of reconfigureable computers using more modern FPGA’s with both larger sizes and faster clock speeds could make a workable false target radar imaging system achievable with this type of technology.

E.   recommendations for future work

1.   Develop Implementation of More Range Bins.

The current interface is built to allow scalability to implement any number of range bins in units of 4.  256 range bins have been shown to be too large to fit within the user logic while 128 range bins fits with 68% usage.  Additional work could be performed to determine the actual upper limit for how many range bins will fit within the user logic area.  It is likely that upwards of 200 range bins could fit.  Also, future research could include using more than one user logic chip to implement twice as many range bins.  No known research to date has been performed which uses both user logic chips on the same MAP simultaneously.

2.   Develop a More User-Friendly Programming Environment.

As previously discussed, the SRC-6E lacks a custom code editing environment with modern features such as real time syntax checking.  Automated generation of some of the support files could also be implemented.  Project wizards could be created that ask a few questions and then create the skeletons of the support files for the project.  Changes to one file that affect another could be automatically corrected or at a minimum generate warnings.

3.   Testing Other Applications.

The knowledge base of what types of applications do or do not work efficiently on this system is very small.  Many more algorithms need to be tested on the system.  Programming the same algorithm with both the high level language method and the user macro method would also provide information on which produces better results for different types of algorithms.  Cost and timing comparison to modern, readily available computers should continue to be made.

 

 

appendix A

This appendix contains the C code written by Professor Douglas Fouts that was used as a standard for output correctness and as a source of timing data.  Slight modifications were made to provide for timing result output and increased sample sizes.  The version presented was used on both the SRC-6E and the Windows XP platforms for timing analysis with no modifications.

A.   chip2_sim.c

/* Simulate the DIS-512 chip. */

/* Compile Command */

/* cc Chip2_Sim.c -lm */

/* Range bin phase increment data must be in the file phzinc.txt. */

/* Range bin amplitude scaling data must be in the file ampscal.txt. */

/* Pulse phase samples must be in the file phzsamp.txt. */

/* Output results are put into the file IandQout.txt */

/* Global Included Files */

#include <stdio.h>

#include <math.h>

#include <time.h>

/* Global Defines */

#define rangebins 128     /* Number of range bins. */

#define phzsamps 500000     /* Maximum number of phase samples. */

/* Global Data Structures */

int phzincdat[rangebins],     /* Stores phase increments for each range bin. */

    ampscaldat[rangebins],     /* Stores amplitude scaling factors for each range bin. */

    Ipartres[phzsamps + rangebins][rangebins],     /* Stores partial results for each phase sample */

    Qpartres[phzsamps + rangebins][rangebins],         /*  in each range bin. */

    sintab[32], costab[32],     /* Sin and Cos lookup tables. */

    numofsamps;     /* Used to count number of samples read in from file phzsamp.txt. */

 

/* Read in phase increment values for each range bin, */

/* and store the results in the array phzincdat.      */

rdphzinc()

{

   /* Local Variables */

   FILE *filepnt;

   int rbcnt;

   /* Open the input file phzinc.txt. */

   if ((filepnt = fopen("phzinc.txt", "r")) == NULL)

      fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

   /* For each range bin. */

   for (rbcnt = 0; rbcnt < rangebins; rbcnt++)

   {

      fscanf(filepnt, "%x", &phzincdat[rbcnt]);     /* Read in phase increment value. */

   }   /* end of for loop */

   /* Close input file. */

   fclose(filepnt);

}     /* End of function rdphzinc. */

 

/* Read in amplitude scaling values for each range bin, */

/* and store result in array ampscaldata.               */

rdampscal()

{

   /* Local Variables */

   FILE *filepnt;

   int rbcnt, inptampdat, tstampdat;

 

   /* Open the input file ampscal.txt. */

   if ((filepnt = fopen("ampscal.txt", "r")) == NULL)

      fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

   /* Read in amplitude scaling values for each range bin. */

   for (rbcnt = 0; rbcnt < rangebins; rbcnt++)

   {

      fscanf(filepnt, "%x", &inptampdat);

      ampscaldat[rbcnt] = 0x00000001 & inptampdat;

        tstampdat = 0x00000001 & (inptampdat >> 1);

      if (tstampdat == 1)

           ampscaldat[rbcnt] = ampscaldat[rbcnt] + 2;

      tstampdat = 0x00000001 & (inptampdat >> 2);

         if (tstampdat == 1)

              ampscaldat[rbcnt] = ampscaldat[rbcnt] + 3;

      tstampdat = 0x00000001 & (inptampdat >> 3);

         if (tstampdat == 1)

              ampscaldat[rbcnt] = ampscaldat[rbcnt] + 4;

   }

   /* Close input file. */

   fclose(filepnt);

}     /* End of function rdampscal. */

 

/* Initialize the global storage arrays. */

initarrays()

{

   /* Local Variables */

   int sampnum, rbnum;

 

   /* Initialize the partial result array. */

   for (sampnum = 0; sampnum < phzsamps; sampnum++)

      for (rbnum = 0; rbnum < rangebins; rbnum++)

        {

              Ipartres[sampnum + rbnum][rbnum] = 0;

          Qpartres[sampnum + rbnum][rbnum] = 0;

        }

   /* Initialize the sin table. */

   sintab[0] = 0x00000000;

   sintab[1] = 0x00000019;

   sintab[2] = 0x00000031;

   sintab[3] = 0x00000047;

   sintab[4] = 0x0000005A;

   sintab[5] = 0x0000006A;

   sintab[6] = 0x00000075;

   sintab[7] = 0x0000007D;

   sintab[8] = 0x0000007F;

   sintab[9] = 0x0000007D;

   sintab[10] = 0x00000075;

   sintab[11] = 0x0000006A;

   sintab[12] = 0x0000005A;

   sintab[13] = 0x00000047;

   sintab[14] = 0x00000031;

   sintab[15] = 0x00000019;

   sintab[16] = 0x00000000;

   sintab[17] = 0xFFFFFFE7;

   sintab[18] = 0xFFFFFFCF;

   sintab[19] = 0xFFFFFFB9;

   sintab[20] = 0xFFFFFFA6;

   sintab[21] = 0xFFFFFF96;

   sintab[22] = 0xFFFFFF8B;

   sintab[23] = 0xFFFFFF83;

   sintab[24] = 0xFFFFFF81;

   sintab[25] = 0xFFFFFF83;

   sintab[26] = 0xFFFFFF8B;

   sintab[27] = 0xFFFFFF96;

   sintab[28] = 0xFFFFFFA6;

   sintab[29] = 0xFFFFFFB9;

   sintab[30] = 0xFFFFFFCF;

   sintab[31] = 0xFFFFFFE7;

   /* Initialize the cos table. */

   costab[0] = 0x0000007F;

   costab[1] = 0x0000007D;

   costab[2] = 0x00000075;

   costab[3] = 0x0000006A;

   costab[4] = 0x0000005A;

   costab[5] = 0x00000047;

   costab[6] = 0x00000031;

   costab[7] = 0x00000019;

   costab[8] = 0x00000000;

   costab[9] = 0xFFFFFFE7;

   costab[10] = 0xFFFFFFCF;

   costab[11] = 0xFFFFFFB9;

   costab[12] = 0xFFFFFFA6;

   costab[13] = 0xFFFFFF96;

   costab[14] = 0xFFFFFF8B;

   costab[15] = 0xFFFFFF83;

   costab[16] = 0xFFFFFF81;

   costab[17] = 0xFFFFFF83;

   costab[18] = 0xFFFFFF8B;

   costab[19] = 0xFFFFFF96;

   costab[20] = 0xFFFFFFA6;

   costab[21] = 0xFFFFFFB9;

   costab[22] = 0xFFFFFFCF;

   costab[23] = 0xFFFFFFE7;

   costab[24] = 0x00000000;

   costab[25] = 0x00000019;

   costab[26] = 0x00000031;

   costab[27] = 0x00000047;

   costab[28] = 0x0000005A;

   costab[29] = 0x0000006A;

   costab[30] = 0x00000075;

   costab[31] = 0x0000007D;

}     /* End of function initarrays. */

 

/* Read in pulse phase samples and calculate partial */

/* results for each range bin and store result in    */

/* the arrays Ipartres and Qpartres.                 */

rdphzsamp()

{

   /* Local Variables */

   FILE *filepnt;

   int phzdat, phzaddout, ILUTOut, QLUTOut, IGainOut, QGainOut, rbcnt;

 

   /* Open the input file phzsamp.txt. */

   if ((filepnt = fopen("phzsamp.txt", "r")) == NULL)

      fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

   /* Process each phase sample in the file phzsamp.txt. */

   numofsamps = 0;

   while (fscanf(filepnt, "%x", &phzdat) != EOF)

   {

      /* Process the new phase sample in each range bin and store the result. */

      for (rbcnt = 0; rbcnt < rangebins; rbcnt++)

      {

         /* Increment the phase. */

         phzaddout = phzdat + phzincdat[rbcnt];

         phzaddout = phzaddout & 0x0000001F;

         /* Calculate I for each range bin and store the result. */

         ILUTOut = costab[phzaddout];

         IGainOut = ILUTOut << ampscaldat[rbcnt];

             if (IGainOut >= 0)

                   IGainOut = IGainOut >> 5;

             else

                   IGainOut = (IGainOut >> 5) | 0xFFFFE000;

             IGainOut = IGainOut & 0x0000FFFF;

         Ipartres[numofsamps + rbcnt][rbcnt] = IGainOut;

         /* Calculate Q for each range bin and store the result. */

         QLUTOut = sintab[phzaddout];

         QGainOut = QLUTOut << ampscaldat[rbcnt];

             if (QGainOut >= 0)

                   QGainOut = QGainOut >> 5;

             else

                   QGainOut = (QGainOut >> 5) | 0xFFFFE000;

             QGainOut = QGainOut & 0x0000FFFF;

         Qpartres[numofsamps + rbcnt][rbcnt] = QGainOut;

      }

      /* Increment the number of phase samples counter. */

      numofsamps++;

   }     /* End of outside while loop. */

   /* Close input file. */

   fclose(filepnt);

}     /* End of function rdphzsamp. */

 

/* Sum partial results in the array partres and write */

/* final sums to the output file IandQout.txt.        */

sumpartres()

{

   /* Local Variables */

   FILE *filepnt;

   int sampnum, rbnum, finIout, finQout, IOF, QOF, signofA, signofB, signofsum;

   /* Open output file for writing. */

   if ((filepnt = fopen("IandQout.txt", "w")) == NULL)

      fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

   /* put headers in output file */

   fprintf(filepnt, " I_OF_Out    Iout    Q_OF_Out   Qout\n");

   fprintf(filepnt, " --------   ------   --------   ------\n\n");

   /* for all phase samples that were read in */

   for (sampnum = 0; sampnum < (numofsamps + rangebins - 1); sampnum++)

   {

      finIout = finQout = IOF = QOF = 0;     /* initialize final result */

        rbnum = rangebins - 1;

      while (rbnum >= 0)

      {

              signofA = (finIout >> 15) & 0x00000001;

              signofB = (Ipartres[sampnum][rbnum] >> 15) & 0x00000001;

          finIout = (finIout + Ipartres[sampnum][rbnum]) & 0x0000FFFF;

              signofsum = (finIout >> 15) & 0x00000001;

              if ((signofA == 0) && (signofB == 0) && (signofsum == 1))

                    IOF = 1;

          if ((signofA == 1) && (signofB == 1) && (signofsum == 0))

                    IOF = 1;

 

          signofA = (finQout >> 15) & 0x00000001;

              signofB = (Qpartres[sampnum][rbnum] >> 15) & 0x00000001;

          finQout = (finQout + Qpartres[sampnum][rbnum]) & 0x0000FFFF;

          signofsum = (finQout >> 15) & 0x00000001;

              if ((signofA == 0) && (signofB == 0) && (signofsum == 1))

                    QOF = 1;

          if ((signofA == 1) && (signofB == 1) && (signofsum == 0))

                    QOF = 1;

          rbnum--;

      }

      /* Print out result to output file. */

      fprintf(filepnt, "    %d       0x%04X      %d       0x%04X\n", IOF, finIout, QOF, finQout);

   }   /* end of outer for loop */

   /* Close output file. */

   fclose (filepnt);

}     /* End of function sumpartres. */

 

main()

{

   /* Local Variables */

      clock_t start, finish;

      double duration;

      FILE *filepnt;

      start=clock();

   /* Read in phase increment data for each range bin. */

   rdphzinc();

   /* Read in amplitude scaling data for each range bin. */

   rdampscal();

   /* Initialize global storage arrays. */

   initarrays();

   /* Read in pulse phase samples and calculate partial results. */

   rdphzsamp();

   /* Sum partial results and output sums. */

   sumpartres();

   finish=clock();

   duration = (double)(finish - start) / CLOCKS_PER_SEC;

   /* Open output file for writing. */

   if ((filepnt = fopen("Time.txt", "w")) == NULL)

      fprintf(stderr, "\n\nTERMINAL FAULT:  File Time.txt cannot be written.\n\n");

      /* Print out result to output file. */

      fprintf(filepnt, "Time to complete %i samples: %2.4f seconds.\n", numofsamps, duration);

   /* Close output file. */

   fclose (filepnt);

}     /* End of main. */

Appendix B

This appendix contains the VHDL code that was both tested with Aldec Active-HDL and ported to the SRC-6E.  The full code is shown for the 4 bin version.  Only the changed portion is shown for the other version.  The 4 bin model is labeled to show the section replaced by the other version’s code.

A.   4 Bin macro vhdl

------------------------------------------------------------

-- Title       : FourBin

------------------------------------------------------------

 

library IEEE;

use IEEE.STD_LOGIC_1164.all;

 

entity DFlipFlop is

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit := '1');

end DFLipFlop;                                                                                                                                                            

 

architecture Equations of DFlipFlop is

begin

process (CLK, LD, RESET)

begin

if CLK='1' and CLK'EVENT then

if  RESET='1' then

Q <= '0';

elsif LD='1' then

Q <= D;

end if;

end if;

end process;

Qnot <= not Q;

end Equations;

 

entity Register5 is

port (CLK,LD,RESET: in bit; D5: in bit_vector (4 downto 0);

      Q5: inout bit_vector (4 downto 0);

Q5not: out bit_vector (4 downto 0));

end Register5;                                                                                                                                                                                                                                                   

 

architecture Register5 of Register5 is

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;

begin

DFF0: DFlipFlop port map (CLK, LD, RESET, D5(0), Q5(0), Q5not(0));

DFF1: DFlipFlop port map (CLK, LD, RESET, D5(1), Q5(1), Q5not(1));

DFF2: DFlipFlop port map (CLK, LD, RESET, D5(2), Q5(2), Q5not(2));

DFF3: DFlipFlop port map (CLK, LD, RESET, D5(3), Q5(3), Q5not(3));

DFF4: DFlipFlop port map (CLK, LD, RESET, D5(4), Q5(4), Q5not(4));

end Register5;

 

entity Register8 is

port (CLK, LD, RESET: in bit; D8: in bit_vector (7 downto 0);

Q8: inout bit_vector (7 downto 0);

Q8not: out bit_vector (7 downto 0));

end Register8;

 

architecture Register8 of Register8 is

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

begin

DFF0: DFlipFlop port map (CLK, LD, RESET, D8(0), Q8(0), Q8not(0));

DFF1: DFlipFlop port map (CLK, LD, RESET, D8(1), Q8(1), Q8not(1));

DFF2: DFlipFlop port map (CLK, LD, RESET, D8(2), Q8(2), Q8not(2));

DFF3: DFlipFlop port map (CLK, LD, RESET, D8(3), Q8(3), Q8not(3));

DFF4: DFlipFlop port map (CLK, LD, RESET, D8(4), Q8(4), Q8not(4));

DFF5: DFlipFlop port map (CLK, LD, RESET, D8(5), Q8(5), Q8not(5));

DFF6: DFlipFlop port map (CLK, LD, RESET, D8(6), Q8(6), Q8not(6));

DFF7: DFlipFlop port map (CLK, LD, RESET, D8(7), Q8(7), Q8not(7));

end Register8;

 

entity Register13 is

port (CLK, LD, RESET: in bit; D13: in bit_vector (12 downto 0);

Q13: inout bit_vector (12 downto 0);

Q13not: out bit_vector (12 downto 0));

end Register13;

 

architecture Register13 of Register13 is

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

begin

DFF0: DFlipFlop port map (CLK, LD, RESET, D13(0), Q13(0), Q13not(0));

DFF1: DFlipFlop port map (CLK, LD, RESET, D13(1), Q13(1), Q13not(1));

DFF2: DFlipFlop port map (CLK, LD, RESET, D13(2), Q13(2), Q13not(2));

DFF3: DFlipFlop port map (CLK, LD, RESET, D13(3), Q13(3), Q13not(3));

DFF4: DFlipFlop port map (CLK, LD, RESET, D13(4), Q13(4), Q13not(4));

DFF5: DFlipFlop port map (CLK, LD, RESET, D13(5), Q13(5), Q13not(5));

DFF6: DFlipFlop port map (CLK, LD, RESET, D13(6), Q13(6), Q13not(6));

DFF7: DFlipFlop port map (CLK, LD, RESET, D13(7), Q13(7), Q13not(7)); 

DFF8: DFlipFlop port map (CLK, LD, RESET, D13(8), Q13(8), Q13not(8));

DFF9: DFlipFlop port map (CLK, LD, RESET, D13(9), Q13(9), Q13not(9));

DFF10: DFlipFlop port map (CLK, LD, RESET, D13(10), Q13(10), Q13not(10));

DFF11: DFlipFlop port map (CLK, LD, RESET, D13(11), Q13(11), Q13not(11));

DFF12: DFlipFlop port map (CLK, LD, RESET, D13(12), Q13(12), Q13not(12));

end Register13;

 

entity Register17 is

port (CLK, LD, RESET: in bit; D17: in bit_vector (16 downto 0);

Q17: inout bit_vector (16 downto 0);

Q17not: out bit_vector (16 downto 0));

end Register17;

 

architecture Register17 of Register17 is

component DFlipFlop

port (CLK, LD, RESET,D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

begin

DFF0: DFlipFlop port map (CLK, LD, RESET, D17(0), Q17(0), Q17not(0));

DFF1: DFlipFlop port map (CLK, LD, RESET, D17(1), Q17(1), Q17not(1));

DFF2: DFlipFlop port map (CLK, LD, RESET, D17(2), Q17(2), Q17not(2));

DFF3: DFlipFlop port map (CLK, LD, RESET, D17(3), Q17(3), Q17not(3));

DFF4: DFlipFlop port map (CLK, LD, RESET, D17(4), Q17(4), Q17not(4));

DFF5: DFlipFlop port map (CLK, LD, RESET, D17(5), Q17(5), Q17not(5));

DFF6: DFlipFlop port map (CLK, LD, RESET, D17(6), Q17(6), Q17not(6));

DFF7: DFlipFlop port map (CLK, LD, RESET, D17(7), Q17(7), Q17not(7)); 

DFF8: DFlipFlop port map (CLK, LD, RESET, D17(8), Q17(8), Q17not(8));

DFF9: DFlipFlop port map (CLK, LD, RESET, D17(9), Q17(9), Q17not(9));

DFF10: DFlipFlop port map (CLK, LD, RESET, D17(10), Q17(10), Q17not(10));

DFF11: DFlipFlop port map (CLK, LD, RESET, D17(11), Q17(11), Q17not(11));

DFF12: DFlipFlop port map (CLK, LD, RESET, D17(12), Q17(12), Q17not(12));

DFF13: DFlipFlop port map (CLK, LD, RESET, D17(13), Q17(13), Q17not(13));

DFF14: DFlipFlop port map (CLK, LD, RESET, D17(14), Q17(14), Q17not(14));

DFF15: DFlipFlop port map (CLK, LD, RESET, D17(15), Q17(15), Q17not(15));

DFF16: DFlipFlop port map (CLK, LD, RESET, D17(16), Q17(16), Q17not(16));

end Register17;

 

entity ROMLUT is

port (SIN, COS:out bit_vector(8 downto 1);

  FIVEBITS:in bit_vector(5 downto 1));

end ROMLUT;

 

architecture ROMLUT of ROMLUT is

 

signal ROMLUTValue : bit_vector(15 downto 0);

 

begin

with FIVEBITS Select

   ROMLUTValue <="0000000001111111" when "00000",--0

"0001100101111101" when "00001",--1

"0011000101110101" when "00010",--2

"0100011101101010" when "00011",--3

"0101101001011010" when "00100",--4

"0110101001000111" when "00101",--5

"0111010100110001" when "00110",--6

"0111110100011001" when "00111",--7

"0111111100000000" when "01000",--8

"0111110111100111" when "01001",--9

"0111010111001111" when "01010",--A

"0110101010111001" when "01011",--b

"0101101010100110" when "01100",--C

"0100011110010110" when "01101",--d

"0011000110001011" when "01110",--E

"0001100110000011" when "01111",--F

"0000000010000001" when "10000",--10

"1110011110000011" when "10001",--11

"1100111110001011" when "10010",--12

"1011100110010110" when "10011",--13

"1010011010100110" when "10100",--14

"1001011010111001" when "10101",--15

"1000101111001111" when "10110",--16

"1000001111100111" when "10111",--17

"1000000100000000" when "11000",--18

"1000001100011001" when "11001",--19

"1000101100110001" when "11010",--1A

"1001011001000111" when "11011",--1b

"1010011001011010" when "11100",--1C

"1011100101101010" when "11101",--1d

"1100111101110101" when "11110",--1E

"1110011101111101" when "11111",--1F

"0000000000000000" when others;--Never Occurs

 

   SIN <= ROMLUTValue(15 downto 8);

   COS <= ROMLUTValue(7 downto 0);

end ROMLUT;                                                                  

 

entity FullAdder is                                                          

port (X, Y, Cin: in bit;

Cout, Sum: out bit);

end FullAdder;

architecture Equations of FullAdder is

begin

Sum <= X xor Y xor Cin;

Cout <= (X and Y) or (X and Cin) or (Y and Cin);

end Equations;

 

entity FullAdderOV is

port (Ci, Cout, OVin: in bit;

  Co, OVout: out bit);

end FullAdderOV;

 

architecture Equations of FullAdderOV is

begin

Co <= Cout;

OVout <= OVin or (Ci xor Cout);

end Equations;

 

entity Adder5 is

port (A, B: in bit_vector(4 downto 0); Ci: in bit;

  S: out bit_vector(4 downto 0); Co: out bit);

end Adder5;

 

architecture Adder5 of Adder5 is

component FullAdder

port (X, Y, Cin: in bit;

Cout, Sum: out bit);

end component;

signal C: bit_vector(4 downto 1);

begin

FA0: FullAdder port map (A(0), B(0), Ci, C(1), S(0));

FA1: FullAdder port map (A(1), B(1), C(1), C(2), S(1));

FA2: FullAdder port map (A(2), B(2), C(2), C(3), S(2));

FA3: FullAdder port map (A(3), B(3), C(3), C(4), S(3));

FA4: FullAdder port map (A(4), B(4), C(4), Co, S(4));

end Adder5;

 

entity CLAH4 is

port (A, B: in bit_vector(3 downto 0); Cin: in bit;

Cout: out bit);

end CLAH4;

 

architecture CLAH4 of CLAH4 is

signal g0, g1, g2, g3, p0, p1, p2, p3: bit;

begin

g0 <= A(0) and B(0);

p0 <= A(0) or B(0);

g1 <= A(1) and B(1);

p1 <= A(1) or B(1);

g2 <= A(2) and B(2);

p2 <= A(2) or B(2);

g3 <= A(3) and B(3);

p3 <= A(3) or B(3);

Cout <= g3 or (p3 and g2) or (p3 and p2 and g1) or (p3 and p2 and p1 and g0) or

(p3 and p2 and p1 and p0 and Cin);

end CLAH4;

 

entity CLAH8 is

port (A, B: in bit_vector(7 downto 0); Cin: in bit;

Cout: out bit);

end CLAH8;

 

architecture CLAH8 of CLAH8 is

signal g0, g1, g2, g3, g4, g5, g6, g7, p0, p1, p2, p3, p4, p5, p6, p7: bit;

begin

g0 <= A(0) and B(0);

p0 <= A(0) or B(0);

g1 <= A(1) and B(1);

p1 <= A(1) or B(1);

g2 <= A(2) and B(2);

p2 <= A(2) or B(2);

g3 <= A(3) and B(3);

p3 <= A(3) or B(3);

g4 <= A(4) and B(4);

p4 <= A(4) or B(4);

g5 <= A(5) and B(5);

p5 <= A(5) or B(5);

g6 <= A(6) and B(6);

p6 <= A(6) or B(6);

g7 <= A(7) and B(7);

p7 <= A(7) or B(7);                                                          

Cout <= g7 or (p7 and g6) or (p7 and p6 and g5) or (p7 and p6 and p5 and g4) or

(p7 and p6 and p5 and p4 and g3) or

(p7 and p6 and p5 and p4 and p3 and g2) or

(p7 and p6 and p5 and p4 and p3 and p2 and g1) or

(p7 and p6 and p5 and p4 and p3 and p2 and p1 and g0) or

(p7 and p6 and p5 and p4 and p3 and p2 and p1 and p0 and Cin);

end CLAH8;

 

entity Adder16 is                                                            

port (A, B: in bit_vector(15 downto 0); Ci, OVin: in bit;

  S: out bit_vector(16 downto 0); Co: out bit);

end Adder16; --bit 16 of S is overflow

 

architecture Adder16 of Adder16 is

component CLAH4

port (A, B: in bit_vector(3 downto 0); Cin: in bit;

Cout: out bit);

end component;

component CLAH8

port (A, B: in bit_vector(7 downto 0); Cin: in bit;

Cout: out bit);

end component;

component FullAdder

port (X, Y, Cin: in bit;

Cout, Sum: out bit);

end component;

component FullAdderOV

port (Ci, Cout, OVin: in bit;

  Co, OVout: out bit);

end component;

 

signal C: bit_vector(16 downto 1);

signal dummy1, dummy2, dummy3: bit;

begin

FA0: FullAdder port map (A(0), B(0), Ci, C(1), S(0));

FA1: FullAdder port map (A(1), B(1), C(1), C(2), S(1));

FA2: FullAdder port map (A(2), B(2), C(2), C(3), S(2));

FA3: FullAdder port map (A(3), B(3), C(3), dummy1, S(3));

CLAH0: CLAH4 port map (A(3 downto 0), B(3 downto 0), Ci, C(4));

FA4: FullAdder port map (A(4), B(4), C(4), C(5), S(4));

FA5: FullAdder port map (A(5), B(5), C(5), C(6), S(5));

FA6: FullAdder port map (A(6), B(6), C(6), C(7), S(6));

FA7: FullAdder port map (A(7), B(7), C(7), dummy2, S(7));

CLAH1: CLAH8 port map (A(7 downto 0), B(7 downto 0), Ci, C(8));

FA8: FullAdder port map (A(8), B(8), C(8), C(9), S(8));

FA9: FullAdder port map (A(9), B(9), C(9), C(10), S(9));

FA10: FullAdder port map (A(10), B(10), C(10), C(11), S(10));

FA11: FullAdder port map (A(11), B(11), C(11), dummy3, S(11));

CLAH2: CLAH4 port map (A(11 downto 8), B(11 downto 8), C(8), C(12));

FA12: FullAdder port map (A(12), B(12), C(12), C(13), S(12));

FA13: FullAdder port map (A(13), B(13), C(13), C(14), S(13));

FA14: FullAdder port map (A(14), B(14), C(14), C(15), S(14));

FA15: FullAdder port map (A(15), B(15), C(15), C(16), S(15));

FAOV: FullAdderOV port map (C(15), C(16), OVin, Co, S(16));

end Adder16;

 

entity ControlLogic is

port (ODVin, URB, PSVin, CLK, OPER: in bit;

CLR13, CLR17: out bit := '1'; ODVout, PSVout: out bit);

end ControlLogic;

 

architecture ControlLogic of ControlLogic is

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                                                                                                         

signal RESET,D1,Q1,Q1Not,D2,Q2,Q2Not,D3,Q3,Q3Not,D4,Q4,Q4Not,

PSVD,PSVQ,PSVQNot:bit;

begin

RESET <= '0';

PSVFF: DFlipFlop port map (CLK, OPER, RESET, PSVD, PSVQ, PSVQNot);

DFF1: DFLipFlop port map(CLK, OPER, RESET, D1, Q1, Q1Not);                   

DFF2: DFLipFlop port map(CLK, OPER, RESET, D2, Q2, Q2Not);

DFF3: DFLipFlop port map(CLK, OPER, RESET, D3, Q3, Q3Not);

DFF4: DFLipFlop port map(CLK, OPER, RESET, D4, Q4, Q4Not);

PSVD <= PSVin;

D1 <= URB and PSVQ;

D2 <= Q1;

D3 <= ODVin or Q2;

D4 <= Q3;

CLR13 <= Q2Not;

CLR17 <= Q3Not;

PSVout <= PSVQ;

ODVout <= Q4;

end ControlLogic;

 

entity GainShifter is

port (Control:in bit_vector(4 downto 1);

Data: in bit_vector(8 downto 1);

Output: out bit_vector(13 downto 1));

end GainShifter;

 

architecture GainShifter of GainShifter is

begin

process (Control,Data)

begin                                                                        

Output(13 downto 1) <= "0000000000000";

case Control is

when "0000" => Output(3 downto 1) <= Data(8 downto 6);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 4) <= "1111111111";

end if;

when "0001" => Output(4 downto 1) <= Data(8 downto 5);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 5) <= "111111111";

end if;

when "0010" => Output(5 downto 1) <= Data(8 downto 4);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 6) <= "11111111";

end if;

when "0011" => Output(6 downto 1) <= Data(8 downto 3);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 7) <= "1111111";

end if;

when "0100" => Output(6 downto 1) <= Data(8 downto 3);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 7) <= "1111111";

end if;

when "0101" => Output(7 downto 1) <= Data(8 downto 2);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 8) <= "111111";

end if;

when "0110" => Output(8 downto 1) <= Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 9) <= "11111";

end if;

when "0111" => Output(9 downto 2) <= Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 10) <= "1111";

end if;

when "1000" => Output(7 downto 1) <= Data(8 downto 2);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 8) <= "111111";

end if;

when "1001" => Output(8 downto 1) <= Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 9) <= "11111";

end if;

when "1010" => Output(9 downto 2) <= Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 10) <= "1111";

end if;

when "1011" => Output(10 downto 3) <= Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 11) <= "111";

end if;

when "1100" => Output(10 downto 3) <=Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 11) <= "111";

end if;

when "1101" => Output(11 downto 4) <=Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13 downto 12) <= "11";

end if;

when "1110" => Output(12 downto 5) <=Data(8 downto 1);

if Data(8)='1' then --need to preserve the sign bit

Output(13) <= '1';

end if;

when "1111" => Output(13 downto 6) <=Data(8 downto 1);

when others => -- summon blue screen of death

end case;

end process;

end GainShifter;

entity OneBin is                                                                      

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN, OtherBinDataCOS: in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end OneBin;

 

architecture OneBin of OneBin is

component Register5 is

port (CLK, LD, RESET: in bit; D5: in bit_vector (4 downto 0);

Q5: inout bit_vector (4 downto 0); Q5not: out bit_vector (4 downto 0));

end component;

component Register8 is

port (CLK, LD, RESET: in bit; D8: in bit_vector (7 downto 0);

Q8: inout bit_vector (7 downto 0); Q8not: out bit_vector (7 downto 0));

end component;

component Register13 is

port (CLK, LD, RESET: in bit; D13: in bit_vector (12 downto 0);

Q13: inout bit_vector(12 downto 0);Q13not:out bit_vector(12 downto 0));

end component;

component Register17 is

port (CLK, LD, RESET: in bit; D17: in bit_vector (16 downto 0);

Q17: inout bit_vector(16 downto 0);Q17not:out bit_vector(16 downto 0));

end component;                                                               

component Adder5 is

port (A, B: in bit_vector(4 downto 0); Ci: in bit;

  S: out bit_vector(4 downto 0); Co: out bit);

end component;

component Adder16 is

port (A, B: in bit_vector(15 downto 0); Ci, OVin: in bit;

  S: out bit_vector(16 downto 0); Co: out bit);

end component;

component ROMLUT is

port (SIN, COS:out bit_vector(1 to 8);

  FIVEBITS:in bit_vector(1 to 5));

end component;

component GainShifter is

port (Control:in bit_vector(4 downto 1);Data:in bit_vector(8 downto 1);

Output: out bit_vector(13 downto 1));

end component;

component ControlLogic is

port (ODVin, URB, PSVin, CLK, OPER: in bit;

  CLR13, CLR17, ODVout, PSVout: out bit);

end component;

 

signal QOutReg1,QNotOutReg1,QOutReg2,QNotOutReg2,QOutReg3,QNotOutReg3,QOutReg4,QNotOutReg4,

QOutReg5,QNotOutReg5,QOutReg6,QNotOutReg6,OutAdd1: bit_vector (5 downto 1);  

signal QOutReg7,QNotOutReg7,QOutReg8,QNotOutReg8,LUTSIN, LUTCOS: bit_vector (8 downto 1);

signal QOutReg9,QNotOutReg9,QOutReg10,QNotOutReg10, OutShiftSIN, OutShiftCOS: bit_vector (13 downto 1);

signal QOutReg11,QNotOutReg11,QOutReg12,QNotOutReg12,QOutReg13,QNotOutReg13,QOutReg14,QNotOutReg14,

OutAdd2, OutAdd3: bit_vector (17 downto 1);

signal InputAdder2, InputAdder3: bit_vector (16 downto 1);

signal OPER, LD, CLR5, CLR8, CLR13, CLR17, Ci, Co1, Co2, Co3,

Reset_Inact: bit;

signal InReg5: bit_vector (5 downto 1);

begin                                                                        

OPER <='1';

CLR5 <= '0';

CLR8 <= '0';

Ci <= '0';

LD <= '1';

Reset_Inact <= '0';

InReg5(4 downto 1) <= Gain (4 downto 1);

InReg5(5) <= URB;

Reg1: Register5 port map(CLK, PRB, CLR5, PhaseInc(5 downto 1),

QOutReg1(5 downto 1), QNotOutReg1(5 downto 1));

Reg2: Register5 port map(CLK, UNP, CLR5, QOutReg1(5 downto 1),

QOutReg2(5 downto 1), QNotOutReg2(5 downto 1));

Reg3: Register5 port map(CLK, LD, CLR5, PhaseSamp(5 downto 1),

QOutReg3(5 downto 1), QNotOutReg3(5 downto 1));

Add1: Adder5 port map (QOutReg2,QOutReg3, Ci, OutAdd1(5 downto 1), Co1);

Reg4: Register5 port map(CLK, LD, CLR5, OutAdd1(5 downto 1),

QOutReg4(5 downto 1), QNotOutReg4(5 downto 1));

LUT: ROMLUT port map (LUTSIN(8 downto 1),LUTCOS(8 downto 1),

QOutReg4(5 downto 1));

Reg5: Register5 port map(CLK, PRB, CLR5, InReg5(5 downto 1),

QOutReg5(5 downto 1), QNotOutReg5(5 downto 1));

Reg6: Register5 port map(CLK, UNP, CLR5, QOutReg5(5 downto 1),

QOutReg6(5 downto 1), QNotOutReg6(5 downto 1));

Reg7: Register8 port map(CLK, LD, CLR8, LUTSIN(8 downto 1),

QOutReg7(8 downto 1), QNotOutReg7(8 downto 1));

Reg8: Register8 port map(CLK, LD, CLR8, LUTCOS(8 downto 1),

QOutReg8(8 downto 1), QNotOutReg8(8 downto 1));

Shift1: GainShifter port map (QOutReg6(4 downto 1), QOutReg7(8 downto 1),OutShiftSIN(13 downto 1));

Shift2: GainShifter port map (QOutReg6(4 downto 1), QOutReg8(8 downto 1),OutShiftCOS(13 downto 1));

Reg9: Register13 port map(CLK, LD, CLR13, OutShiftSIN(13 downto 1), QOutReg9(13 downto 1),QNotOutReg9(13 downto 1));

Reg10: Register13 port map(CLK, LD, CLR13, OutShiftCOS(13 downto 1), QOutReg10(13 downto 1), QNotOutReg10(13 downto 1));                                                  

Reg11: Register17 port map(CLK, LD, Reset_Inact, OtherBinDataSIN(17 downto 1), QOutReg11(17 downto 1), QNotOutReg11(17 downto 1));                                       

Reg12: Register17 port map(CLK, LD, Reset_Inact, OtherBinDataCOS(17 downto 1), QOutReg12(17 downto 1), QNotOutReg12(17 downto 1));                                       

Add2: Adder16 port map (InputAdder2, QOutReg11(16 downto 1), Ci, QOutReg11(17), OutAdd2(17 downto 1),Co2);

Add3: Adder16 port map (InputAdder3, QOutReg12(16 downto 1), Ci, QOutReg12(17), OutAdd3(17 downto 1),Co3);

Reg13: Register17 port map(CLK, LD, CLR17, OutAdd2(17 downto 1), QOutReg13(17 downto 1), QNotOutReg13(17 downto 1));

Reg14: Register17 port map(CLK, LD, CLR17, OutAdd3(17 downto 1), QOutReg14(17 downto 1), QNotOutReg14(17 downto 1));

Control: ControlLogic port map (ODVin, QOutReg6(5), PSVin, CLK, OPER, CLR13, CLR17, ODVout, PSVout);

InputAdder2(13 downto 1) <= QOutReg9(13 downto 1);

InputAdder2(14) <= QOutReg9(13);

InputAdder2(15) <= QOutReg9(13);

InputAdder2(16) <= QOutReg9(13);

InputAdder3(13 downto 1) <= QOutReg10(13 downto 1);

InputAdder3(14) <= QOutReg10(13);

InputAdder3(15) <= QOutReg10(13);

InputAdder3(16) <= QOutReg10(13);

DRFM(5 downto 1) <= QOutReg3(5 downto 1);

Q <= QOutReg13;

I <= QOutReg14;

end OneBin;

 

--**** BEGIN REPLACE HERE *****

 

entity FourBin is

port (Input: in bit_vector (63 downto 0);

Output:out bit_vector (63 downto 0); CLK: in bit);

end FourBin;

 

architecture FourBin of FourBin is

 

component OneBin is

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN,OtherBinDataCOS:in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end component;

 

signal Q, I, Q1,I1,Q2,I2,Q3,I3: bit_vector (17 downto 1) :="00000000000000000";

signal DRFM0,DRFM1,DRFM2,DRFM3: bit_vector (5 downto 1):="00000";

signal PSVout0,PSVout1,PSVout2,PSVout3: bit:='0';

signal ODVout0,ODVout1,ODVout2,ODVout3: bit:='0';

signal Gain0,Gain1,Gain2,Gain3: bit_vector (4 downto 1):="0000";

signal PhaseInc0,PhaseInc1,PhaseInc2,PhaseInc3: bit_vector (5 downto 1) :="00000";

signal URB0,URB1,URB2,URB3: bit :='0';

signal PhaseSamp: bit_vector (5 downto 1):= "00000";

signal PRB, UNP, PSVin, ODVin: bit :='0';

 

begin -- BIN0 is the primary output

--Input: formats, cycle begins when PRB=1, 1 format per clock

-- ten bits of each bin: 10 |  9-5   |4-1 |

--                                                                                                                                                                                  URB|PhaseInc|Gain|

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

-- 63-8                              | 7-3   | 2    | 1  | 0

--unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 2 if PSVin and UNP are taken high

 

PRB<=Input(0);

UNP<=Input(1);

PSVin<=Input(2);

PhaseSamp<=Input(7 downto 3);

-- Bin 0 data

URB0<=Input(17);

PhaseInc0<=Input(16 downto 12);

Gain0<=Input(11 downto 8);

-- Bin 1 Data

URB1<=Input(27);

PhaseInc1<=Input(26 downto 22);

Gain1<=Input(21 downto 18);                                                  

-- Bin 2 data

URB2<=Input(37);

PhaseInc2<=Input(36 downto 32);

Gain2<=Input(31 downto 28);

-- Bins 3 data

URB3<=Input(47);

PhaseInc3<=Input(46 downto 42);

Gain3<=Input(41 downto 38);

                                                                             

BIN0: OneBin port map (DRFM1, PhaseInc0, Gain0, URB0, UNP, PRB, ODVout1, PSVout1, Q1, I1, Q, I, ODVout0, PSVout0, DRFM0, CLK);

BIN1: OneBin port map (DRFM2, PhaseInc1, Gain1, URB1, UNP, PRB, ODVout2, PSVout2, Q2, I2, Q1, I1, ODVout1, PSVout1, DRFM1, CLK);

BIN2: OneBin port map (DRFM3, PhaseInc2, Gain2, URB2, UNP, PRB, ODVout3, PSVout3, Q3, I3, Q2, I2, ODVout2, PSVout2, DRFM2, CLK);

BIN3: OneBin port map (PhaseSamp, PhaseInc3, Gain3, URB3, UNP, PRB, ODVin, PSVin, "00000000000000000", "00000000000000000", Q3, I3,

ODVout3, PSVout3, DRFM3, CLK);

 

-- Output Format:

-- 63-41 |   40   |   39   | 38-22 | 21-5 | 4-0

--unused | PSVout | ODVout |   Q   |   I  | DRFM

 

Output(40)<=PSVout0;

Output(39)<=ODVout0;

Output(38 downto 22)<=Q;

Output(21 downto 5)<=I;

Output(4 downto 0)<=DRFM0;

Output(63 downto 41)<="00000000000000000000000";

 

end FourBin;

 

--**** END REPLACE HERE *****

 

B.   8 Bin macro vhdl

entity EightBin is

port (Input: in bit_vector (63 downto 0);

Output:out bit_vector (63 downto 0); CLK: in bit);

end EightBin;

 

architecture EightBin of EightBin is

 

component OneBin is

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN,OtherBinDataCOS:in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end component;

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;

signal Q, I, Q1,I1,Q2,I2,Q3,I3,Q4,I4,Q5,I5,Q6,I6,Q7,I7: bit_vector (17 downto 1):="00000000000000000";

signal DRFM0,DRFM1,DRFM2,DRFM3,DRFM4,DRFM5,DRFM6,DRFM7: bit_vector (5 downto 1):="00000";

signal PSVout0,PSVout1,PSVout2,PSVout3,PSVout4,PSVout5,PSVout6,PSVout7: bit:='0';

signal ODVout0,ODVout1,ODVout2,ODVout3,ODVout4,ODVout5,ODVout6,ODVout7: bit:='0';

signal Gain0,Gain1,Gain2,Gain3,Gain4,Gain5,Gain6,Gain7: bit_vector (4 downto 1):="0000";

signal PhaseInc0,PhaseInc1,PhaseInc2,PhaseInc3,PhaseInc4,

PhaseInc5,PhaseInc6,PhaseInc7 : bit_vector (5 downto 1):="00000";

signal URB0,URB1,URB2,URB3,URB4,URB5,URB6,URB7: bit :='0';

signal PhaseSamp: bit_vector (5 downto 1):= "00000";

signal UNP, PSVin, ODVin: bit :='0';

signal LD, RESET, PRB, PRB1, PRB1not: bit;

 

begin -- BIN0 is the primary output

--Input: formats, cycle begins when PRB=1, 1 format per clock

-- ten bits of each bin: 10 |  9-5   |4-1 |

--                                                                                                                                                                                  URB|PhaseInc|Gain|

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

-- 63-8                              | 7-3   | 2    | 1  | 0

--unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 3 if PSVin and UNP are taken high

LD<='1';

RESET<='0';

PRB<=Input(0);

UNP<=Input(1);

PSVin<=Input(2);

PhaseSamp<=Input(7 downto 3);

-- Bins 0,4 data

URB0<=Input(17);

PhaseInc0<=Input(16 downto 12);

Gain0<=Input(11 downto 8);

URB4<=Input(17);

PhaseInc4<=Input(16 downto 12);

Gain4<=Input(11 downto 8);

-- Bins 1,5 data

URB1<=Input(27);

PhaseInc1<=Input(26 downto 22);

Gain1<=Input(21 downto 18);                                                  

URB5<=Input(27);

PhaseInc5<=Input(26 downto 22);

Gain5<=Input(21 downto 18);

-- Bins 2,6 data

URB2<=Input(37);

PhaseInc2<=Input(36 downto 32);

Gain2<=Input(31 downto 28);

URB6<=Input(37);

PhaseInc6<=Input(36 downto 32);

Gain6<=Input(31 downto 28);

-- Bins 3,7 data

URB3<=Input(47);

PhaseInc3<=Input(46 downto 42);

Gain3<=Input(41 downto 38);

URB7<=Input(47);

PhaseInc7<=Input(46 downto 42);

Gain7<=Input(41 downto 38);

                                                                             

DFF: DFlipFlop port map (CLK, LD, RESET, PRB, PRB1, PRB1not);

BIN0: OneBin port map (DRFM1, PhaseInc0, Gain0, URB0, UNP, PRB, ODVout1, PSVout1, Q1, I1, Q, I, ODVout0, PSVout0, DRFM0, CLK);

BIN1: OneBin port map (DRFM2, PhaseInc1, Gain1, URB1, UNP, PRB, ODVout2, PSVout2, Q2, I2, Q1, I1, ODVout1, PSVout1, DRFM1, CLK);

BIN2: OneBin port map (DRFM3, PhaseInc2, Gain2, URB2, UNP, PRB, ODVout3, PSVout3, Q3, I3, Q2, I2, ODVout2, PSVout2, DRFM2, CLK);

BIN3: OneBin port map (DRFM4, PhaseInc3, Gain3, URB3, UNP, PRB, ODVout4, PSVout4, Q4, I4, Q3, I3, ODVout3, PSVout3, DRFM3, CLK);

BIN4: OneBin port map (DRFM5, PhaseInc4, Gain4, URB4, UNP, PRB1, ODVout5, PSVout5, Q5, I5, Q4, I4, ODVout4, PSVout4, DRFM4, CLK);

BIN5: OneBin port map (DRFM6, PhaseInc5, Gain5, URB5, UNP, PRB1, ODVout6, PSVout6, Q6, I6, Q5, I5, ODVout5, PSVout5, DRFM5, CLK);

BIN6: OneBin port map (DRFM7, PhaseInc6, Gain6, URB6, UNP, PRB1, ODVout7, PSVout7, Q7, I7, Q6, I6, ODVout6, PSVout6, DRFM6, CLK);

BIN7: OneBin port map (PhaseSamp, PhaseInc7, Gain7, URB7, UNP, PRB1, ODVin, PSVin, "00000000000000000", "00000000000000000", Q7, I7,

ODVout7, PSVout7, DRFM7, CLK);

-- Output Format:

-- 63-41 |   40   |   39   | 38-22 | 21-5 | 4-0

--unused | PSVout | ODVout |   Q   |   I  | DRFM

 

Output(40)<=PSVout0;

Output(39)<=ODVout0;

Output(38 downto 22)<=Q;

Output(21 downto 5)<=I;

Output(4 downto 0)<=DRFM0;

Output(63 downto 41)<="00000000000000000000000";

 

end EightBin;

 

C.   16 Bin macro vhdl

entity SixteenBin is

port (Input: in bit_vector (63 downto 0);

Output:out bit_vector (63 downto 0); CLK: in bit);

end SixteenBin;

 

architecture SixteenBin of SixteenBin is

 

component OneBin is

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN,OtherBinDataCOS:in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end component;

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

signal Q, I, Q1,I1,Q2,I2,Q3,I3,Q4,I4,Q5,I5,Q6,I6,Q7,I7,Q8,I8,Q9,I9,

Q10,I10,Q11,I11,Q12,I12,Q13,I13,Q14,I14, Q15,I15: bit_vector (17 downto 1):="00000000000000000";

signal DRFM0,DRFM1,DRFM2,DRFM3,DRFM4,DRFM5,DRFM6,DRFM7,DRFM8,DRFM9,

DRFM10,DRFM11,DRFM12,DRFM13,DRFM14,DRFM15: bit_vector (5 downto 1):="00000";

signal PSVout0,PSVout1,PSVout2,PSVout3,PSVout4,PSVout5,PSVout6,

PSVout7,PSVout8,PSVout9,PSVout10,PSVout11,PSVout12,PSVout13,PSVout14,PSVout15: bit:='0';

signal ODVout0,ODVout1,ODVout2,ODVout3,ODVout4,ODVout5,ODVout6,

ODVout7,ODVout8,ODVout9,ODVout10,ODVout11,ODVout12,ODVout13,ODVout14,ODVout15: bit:='0';

signal Gain0,Gain1,Gain2,Gain3,Gain4,Gain5,Gain6,Gain7,Gain8,Gain9,

Gain10,Gain11,Gain12,Gain13,Gain14,Gain15: bit_vector (4 downto 1):="0000";

Signal PhaseInc0,PhaseInc1,PhaseInc2,PhaseInc3,PhaseInc4,PhaseInc5,PhaseInc6,

PhaseInc7 : bit_vector (5 downto 1):="00000";

signal PhaseInc8,PhaseInc9,PhaseInc10,PhaseInc11,PhaseInc12,PhaseInc13,

PhaseInc14,PhaseInc15 : bit_vector (5 downto 1):="00000";

signal URB0,URB1,URB2,URB3,URB4,URB5,URB6,URB7,URB8,URB9,URB10,URB11,

URB12,URB13,URB14,URB15: bit :='0';

signal PhaseSamp: bit_vector (5 downto 1):= "00000";

signal UNP, PSVin, ODVin: bit :='0';

signal LD, RESET, PRB, PRB1, PRB2, PRB3, PRB1not,PRB2not,PRB3not: bit;

 

begin -- BIN0 is the primary output

--Input: formats, cycle begins when PRB=1, 1 format per clock

-- ten bits of each bin: 10 |  9-5   |4-1 |

--                                                                                        URB|PhaseInc|Gain|

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

-- 63-8                              | 7-3   | 2    | 1  | 0

--unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 5 if PSVin and UNP are taken high

LD<='1';

RESET<='0';

PRB<=Input(0);

UNP<=Input(1);

PSVin<=Input(2);

PhaseSamp<=Input(7 downto 3);

-- Bins 0,4,8,12 data

URB0<=Input(17);

PhaseInc0<=Input(16 downto 12);

Gain0<=Input(11 downto 8);

URB4<=Input(17);

PhaseInc4<=Input(16 downto 12);

Gain4<=Input(11 downto 8);

URB8<=Input(17);

PhaseInc8<=Input(16 downto 12);

Gain8<=Input(11 downto 8);

URB12<=Input(17);

PhaseInc12<=Input(16 downto 12);

Gain12<=Input(11 downto 8);

-- Bins 1,5,9,13 data

URB1<=Input(27);

PhaseInc1<=Input(26 downto 22);

Gain1<=Input(21 downto 18);                                                  

URB5<=Input(27);

PhaseInc5<=Input(26 downto 22);

Gain5<=Input(21 downto 18);

URB9<=Input(27);

PhaseInc9<=Input(26 downto 22);

Gain9<=Input(21 downto 18);

URB13<=Input(27);

PhaseInc13<=Input(26 downto 22);

Gain13<=Input(21 downto 18);

-- Bins 2,6,10,14 data

URB2<=Input(37);

PhaseInc2<=Input(36 downto 32);

Gain2<=Input(31 downto 28);

URB6<=Input(37);

PhaseInc6<=Input(36 downto 32);

Gain6<=Input(31 downto 28);

URB10<=Input(37);

PhaseInc10<=Input(36 downto 32);

Gain10<=Input(31 downto 28);

URB14<=Input(37);

PhaseInc14<=Input(36 downto 32);

Gain14<=Input(31 downto 28);

-- Bins 3,7,11,15 data

URB3<=Input(47);

PhaseInc3<=Input(46 downto 42);

Gain3<=Input(41 downto 38);

URB7<=Input(47);

PhaseInc7<=Input(46 downto 42);

Gain7<=Input(41 downto 38);

URB11<=Input(47);

PhaseInc11<=Input(46 downto 42);

Gain11<=Input(41 downto 38);

URB15<=Input(47);

PhaseInc15<=Input(46 downto 42);

Gain15<=Input(41 downto 38);

                                                                             

DFF0: DFlipFlop port map (CLK, LD, RESET, PRB, PRB1, PRB1not);

DFF1: DFlipFlop port map (CLK, LD, RESET, PRB1, PRB2, PRB2not);

DFF2: DFlipFlop port map (CLK, LD, RESET, PRB2, PRB3, PRB3not);

BIN0: OneBin port map (DRFM1, PhaseInc0, Gain0, URB0, UNP, PRB, ODVout1, PSVout1, Q1, I1, Q, I, ODVout0, PSVout0, DRFM0, CLK);

BIN1: OneBin port map (DRFM2, PhaseInc1, Gain1, URB1, UNP, PRB, ODVout2, PSVout2, Q2, I2, Q1, I1, ODVout1, PSVout1, DRFM1, CLK);

BIN2: OneBin port map (DRFM3, PhaseInc2, Gain2, URB2, UNP, PRB, ODVout3, PSVout3, Q3, I3, Q2, I2, ODVout2, PSVout2, DRFM2, CLK);

BIN3: OneBin port map (DRFM4, PhaseInc3, Gain3, URB3, UNP, PRB, ODVout4, PSVout4, Q4, I4, Q3, I3, ODVout3, PSVout3, DRFM3, CLK);

BIN4: OneBin port map (DRFM5, PhaseInc4, Gain4, URB4, UNP, PRB1, ODVout5, PSVout5, Q5, I5, Q4, I4, ODVout4, PSVout4, DRFM4, CLK);

BIN5: OneBin port map (DRFM6, PhaseInc5, Gain5, URB5, UNP, PRB1, ODVout6, PSVout6, Q6, I6, Q5, I5, ODVout5, PSVout5, DRFM5, CLK);

BIN6: OneBin port map (DRFM7, PhaseInc6, Gain6, URB6, UNP, PRB1, ODVout7, PSVout7, Q7, I7, Q6, I6, ODVout6, PSVout6, DRFM6, CLK);

BIN7: OneBin port map (DRFM8, PhaseInc7, Gain7, URB7, UNP, PRB1, ODVout8, PSVout8, Q8, I8, Q7, I7, ODVout7, PSVout7, DRFM7, CLK);

BIN8: OneBin port map (DRFM9, PhaseInc8, Gain8, URB8, UNP, PRB2, ODVout9, PSVout9, Q9, I9, Q8, I8, ODVout8, PSVout8, DRFM8, CLK);

BIN9: OneBin port map (DRFM10, PhaseInc9, Gain9, URB9, UNP, PRB2, ODVout10, PSVout10, Q10, I10, Q9, I9, ODVout9, PSVout9, DRFM9, CLK);

BIN10: OneBin port map (DRFM11, PhaseInc10, Gain10, URB10, UNP, PRB2, ODVout11, PSVout11, Q11, I11, Q10, I10, ODVout10, PSVout10, DRFM10, CLK);

BIN11: OneBin port map (DRFM12, PhaseInc11, Gain11, URB11, UNP, PRB2, ODVout12, PSVout12, Q12, I12, Q11, I11, ODVout11, PSVout11, DRFM11, CLK);

BIN12: OneBin port map (DRFM13, PhaseInc12, Gain12, URB12, UNP, PRB3, ODVout13, PSVout13, Q13, I13, Q12, I12, ODVout12, PSVout12, DRFM12, CLK);

BIN13: OneBin port map (DRFM14, PhaseInc13, Gain13, URB13, UNP, PRB3, ODVout14, PSVout14, Q14, I14, Q13, I13, ODVout13, PSVout13, DRFM13, CLK);

BIN14: OneBin port map (DRFM15, PhaseInc14, Gain14, URB14, UNP, PRB3, ODVout15, PSVout15, Q15, I15, Q14, I14, ODVout14, PSVout14, DRFM14, CLK);

BIN15: OneBin port map (PhaseSamp, PhaseInc15, Gain15, URB15, UNP, PRB3, ODVin, PSVin, "00000000000000000", "00000000000000000", Q15, I15,

ODVout15, PSVout15, DRFM15, CLK);

                                                                             

-- Output Format:

-- 63-41 |   40   |   39   | 38-22 | 21-5 | 4-0

--unused | PSVout | ODVout |   Q   |   I  | DRFM

 

Output(40)<=PSVout0;

Output(39)<=ODVout0;

Output(38 downto 22)<=Q;

Output(21 downto 5)<=I;

Output(4 downto 0)<=DRFM0;

Output(63 downto 41)<="00000000000000000000000";

 

end SixteenBin;

 

D.   64 Bin macro vhdl

entity SixtyFourBin is

port (Input: in bit_vector (63 downto 0);

Output:out bit_vector (63 downto 0); CLK: in bit);

end SixtyFourBin;

 

architecture SixtyFourBin of SixtyFourBin is

 

component OneBin is

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN,OtherBinDataCOS:in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end component;

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

signal Q, I, Q1,I1,Q2,I2,Q3,I3,Q4,I4,Q5,I5,Q6,I6,Q7,I7,Q8,I8,Q9,I9,

Q10,I10,Q11,I11,Q12,I12,Q13,I13,Q14,I14,Q15,I15: bit_vector (17 downto 1):="00000000000000000";

signal Q16, I16, Q17,I17,Q18,I18,Q19,I19,Q20,I20,Q21,I21,Q22,I22,Q23, I23,Q24,I24,Q25,I25,

Q26,I26,Q27,I27,Q28,I28,Q29,I29,Q30,I30,Q31,I31:bit_vector (17 downto 1):="00000000000000000";

signal Q32, I32, Q33,I33,Q34,I34,Q35,I35,Q36,I36,Q37,I37,Q38,I38, Q39,I39,Q40,I40,Q41,I41,

Q42,I42,Q43,I43,Q44,I44,Q45,I45,Q46,I46,Q47,I47: bit_vector (17 downto 1):="00000000000000000";

signal Q48, I48, Q49,I49,Q50,I50,Q51,I51,Q52,I52,Q53,I53,Q54,I54,Q55, I55,Q56,I56,Q57,I57,

Q58,I58,Q59,I59,Q60,I60,Q61,I61,Q62,I62,Q63,I63: bit_vector (17 downto 1):="00000000000000000";

signal DRFM0,DRFM1,DRFM2,DRFM3,DRFM4,DRFM5,DRFM6,DRFM7,DRFM8,DRFM9,

DRFM10,DRFM11,DRFM12,DRFM13,DRFM14,DRFM15: bit_vector (5 downto 1):="00000";

signal DRFM16,DRFM17,DRFM18,DRFM19,DRFM20,DRFM21,DRFM22,DRFM23,DRFM24,DRFM25,

DRFM26,DRFM27,DRFM28,DRFM29,DRFM30,DRFM31: bit_vector (5 downto 1):="00000";

signal DRFM32,DRFM33,DRFM34,DRFM35,DRFM36,DRFM37,DRFM38,DRFM39,DRFM40,DRFM41,

DRFM42,DRFM43,DRFM44,DRFM45,DRFM46,DRFM47: bit_vector (5 downto 1):="00000";

signal DRFM48,DRFM49,DRFM50,DRFM51,DRFM52,DRFM53,DRFM54,DRFM55,DRFM56,DRFM57,

DRFM58,DRFM59,DRFM60,DRFM61,DRFM62,DRFM63: bit_vector (5 downto 1):="00000";

signal PSVout0,PSVout1,PSVout2,PSVout3,PSVout4,PSVout5,PSVout6,

PSVout7,PSVout8,PSVout9,PSVout10,PSVout11,PSVout12,PSVout13,PSVout14, PSVout15: bit:='0';

signal PSVout16,PSVout17,PSVout18,PSVout19,PSVout20,PSVout21,PSVout22,

PSVout23,PSVout24,PSVout25,PSVout26,PSVout27,PSVout28,PSVout29,PSVout30,PSVout31: bit:='0';

signal PSVout32,PSVout33,PSVout34,PSVout35,PSVout36,PSVout37,PSVout38,

PSVout39,PSVout40,PSVout41,PSVout42,PSVout43,PSVout44,PSVout45,PSVout46,PSVout47: bit:='0';

signal PSVout48,PSVout49,PSVout50,PSVout51,PSVout52,PSVout53,PSVout54,

PSVout55,PSVout56,PSVout57,PSVout58,PSVout59,PSVout60,PSVout61,PSVout62,PSVout63: bit:='0';

signal ODVout0,ODVout1,ODVout2,ODVout3,ODVout4,ODVout5,ODVout6,

ODVout7,ODVout8,ODVout9,ODVout10,ODVout11,ODVout12,ODVout13,ODVout14,ODVout15: bit:='0';

signal ODVout16,ODVout17,ODVout18,ODVout19,ODVout20,ODVout21,ODVout22,

ODVout23,ODVout24,ODVout25,ODVout26,ODVout27,ODVout28,ODVout29,ODVout30,ODVout31: bit:='0';

signal ODVout32,ODVout33,ODVout34,ODVout35,ODVout36,ODVout37,ODVout38,

ODVout39,ODVout40,ODVout41,ODVout42,ODVout43,ODVout44,ODVout45,ODVout46,ODVout47: bit:='0';

signal ODVout48,ODVout49,ODVout50,ODVout51,ODVout52,ODVout53,ODVout54,

ODVout55,ODVout56,ODVout57,ODVout58,ODVout59,ODVout60,ODVout61,ODVout62,ODVout63: bit:='0';

signal Gain0,Gain1,Gain2,Gain3,Gain4,Gain5,Gain6,Gain7,Gain8,Gain9,

Gain10,Gain11,Gain12,Gain13,Gain14,Gain15: bit_vector (4 downto 1):="0000";

signal Gain16,Gain17,Gain18,Gain19,Gain20,Gain21,Gain22,Gain23,Gain24,Gain25,

Gain26,Gain27,Gain28,Gain29,Gain30,Gain31: bit_vector (4 downto 1):="0000";

signal Gain32,Gain33,Gain34,Gain35,Gain36,Gain37,Gain38,Gain39,Gain40,Gain41,

Gain42,Gain43,Gain44,Gain45,Gain46,Gain47: bit_vector (4 downto 1):="0000";

signal Gain48,Gain49,Gain50,Gain51,Gain52,Gain53,Gain54,Gain55,Gain56,Gain57,

Gain58,Gain59,Gain60,Gain61,Gain62,Gain63: bit_vector (4 downto 1):="0000";

signal PhaseInc0,PhaseInc1,PhaseInc2,PhaseInc3,PhaseInc4,PhaseInc5,PhaseInc6, PhaseInc7,

PhaseInc8,PhaseInc9,PhaseInc10,PhaseInc11,PhaseInc12,PhaseInc13,PhaseInc14,PhaseInc15 : bit_vector (5 downto 1):="00000";

Signal PhaseInc16,PhaseInc17,PhaseInc18,PhaseInc19,PhaseInc20,PhaseInc21, PhaseInc22,PhaseInc23,

PhaseInc24,PhaseInc25,PhaseInc26,PhaseInc27,PhaseInc28,PhaseInc29,PhaseInc30,PhaseInc31 : bit_vector (5 downto 1):="00000";

signal PhaseInc32,PhaseInc33,PhaseInc34,PhaseInc35,PhaseInc36,PhaseInc37,PhaseInc38,PhaseInc39,

PhaseInc40,PhaseInc41,PhaseInc42,PhaseInc43,PhaseInc44,PhaseInc45,PhaseInc46,PhaseInc47 : bit_vector (5 downto 1):="00000";

signal PhaseInc48,PhaseInc49,PhaseInc50,PhaseInc51,PhaseInc52,PhaseInc53,PhaseInc54,PhaseInc55,

PhaseInc56,PhaseInc57,PhaseInc58,PhaseInc59,PhaseInc60,PhaseInc61,PhaseInc62,PhaseInc63 : bit_vector (5 downto 1):="00000";

signal URB0,URB1,URB2,URB3,URB4,URB5,URB6,URB7,URB8,URB9,URB10,URB11,URB12,URB13,URB14,URB15: bit :='0';

signal URB16,URB17,URB18,URB19,URB20,URB21,URB22,URB23,URB24,URB25,URB26,URB27,URB28,URB29,URB30,URB31: bit :='0';

signal URB32,URB33,URB34,URB35,URB36,URB37,URB38,URB39,URB40,URB41,URB42,URB43,URB44,URB45,URB46,URB47: bit :='0';

signal URB48,URB49,URB50,URB51,URB52,URB53,URB54,URB55,URB56,URB57,URB58,URB59,URB60,URB61,URB62,URB63: bit :='0';

signal PhaseSamp: bit_vector (5 downto 1):= "00000";

signal UNP, PSVin, ODVin: bit :='0';

signal LD, RESET, PRB, PRB1, PRB2, PRB3, PRB4, PRB5, PRB6, PRB7, PRB8, PRB9, PRB10, PRB11, PRB12, PRB13, PRB14, PRB15,

PRB1not,PRB2not,PRB3not,PRB4not,PRB5not,PRB6not,PRB7not,PRB8not,PRB9not,PRB10not,PRB11not,PRB12not,PRB13not,PRB14not,PRB15not: bit;

 

Begin -- BIN0 is the primary output

--Input: formats, cycle begins when PRB=1, 1 format per clock

-- ten bits of each bin: 10 |  9-5   |4-1 |

--                                                                                        URB|PhaseInc|Gain|

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

-- 63-8                              | 7-3   | 2    | 1  | 0

--unused                             |sample |PSVin |UNP |PRB

-- more bins in same pattern up to 63...

-- The first sample can be entered on clock 65 if PSVin and UNP are taken high

LD<='1';

RESET<='0';

PRB<=Input(0);

UNP<=Input(1);

PSVin<=Input(2);

PhaseSamp<=Input(7 downto 3);

-- Bins 0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60 data

URB0<=Input(17);

PhaseInc0<=Input(16 downto 12);

Gain0<=Input(11 downto 8);

URB4<=Input(17);

PhaseInc4<=Input(16 downto 12);

Gain4<=Input(11 downto 8);

URB8<=Input(17);

PhaseInc8<=Input(16 downto 12);

Gain8<=Input(11 downto 8);

URB12<=Input(17);

PhaseInc12<=Input(16 downto 12);

Gain12<=Input(11 downto 8);

URB16<=Input(17);

PhaseInc16<=Input(16 downto 12);

Gain16<=Input(11 downto 8);

URB20<=Input(17);

PhaseInc20<=Input(16 downto 12);

Gain20<=Input(11 downto 8);

URB24<=Input(17);

PhaseInc24<=Input(16 downto 12);

Gain24<=Input(11 downto 8);

URB28<=Input(17);

PhaseInc28<=Input(16 downto 12);

Gain28<=Input(11 downto 8);

URB32<=Input(17);

PhaseInc32<=Input(16 downto 12);

Gain32<=Input(11 downto 8);

URB36<=Input(17);

PhaseInc36<=Input(16 downto 12);

Gain36<=Input(11 downto 8);

URB40<=Input(17);

PhaseInc40<=Input(16 downto 12);

Gain40<=Input(11 downto 8);

URB44<=Input(17);

PhaseInc44<=Input(16 downto 12);

Gain44<=Input(11 downto 8);

URB48<=Input(17);

PhaseInc48<=Input(16 downto 12);

Gain48<=Input(11 downto 8);

URB52<=Input(17);

PhaseInc52<=Input(16 downto 12);

Gain52<=Input(11 downto 8);

URB56<=Input(17);

PhaseInc56<=Input(16 downto 12);

Gain56<=Input(11 downto 8);

URB60<=Input(17);

PhaseInc60<=Input(16 downto 12);

Gain60<=Input(11 downto 8);

-- Bins 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61  data

URB1<=Input(27);

PhaseInc1<=Input(26 downto 22);

Gain1<=Input(21 downto 18);                                                  

URB5<=Input(27);

PhaseInc5<=Input(26 downto 22);

Gain5<=Input(21 downto 18);

URB9<=Input(27);

PhaseInc9<=Input(26 downto 22);

Gain9<=Input(21 downto 18);

URB13<=Input(27);

PhaseInc13<=Input(26 downto 22);

Gain13<=Input(21 downto 18);

URB17<=Input(27);

PhaseInc17<=Input(26 downto 22);

Gain17<=Input(21 downto 18);                                                 

URB21<=Input(27);

PhaseInc21<=Input(26 downto 22);

Gain21<=Input(21 downto 18);

URB25<=Input(27);

PhaseInc25<=Input(26 downto 22);

Gain25<=Input(21 downto 18);

URB29<=Input(27);

PhaseInc29<=Input(26 downto 22);

Gain29<=Input(21 downto 18);

URB33<=Input(27);

PhaseInc33<=Input(26 downto 22);

Gain33<=Input(21 downto 18);                                                 

URB37<=Input(27);

PhaseInc37<=Input(26 downto 22);

Gain37<=Input(21 downto 18);

URB41<=Input(27);

PhaseInc41<=Input(26 downto 22);

Gain41<=Input(21 downto 18);

URB45<=Input(27);

PhaseInc45<=Input(26 downto 22);

Gain45<=Input(21 downto 18);

URB49<=Input(27);

PhaseInc49<=Input(26 downto 22);

Gain49<=Input(21 downto 18);                                                 

URB53<=Input(27);

PhaseInc53<=Input(26 downto 22);

Gain53<=Input(21 downto 18);

URB57<=Input(27);

PhaseInc57<=Input(26 downto 22);

Gain57<=Input(21 downto 18);

URB61<=Input(27);

PhaseInc61<=Input(26 downto 22);

Gain61<=Input(21 downto 18);

-- Bins 2,6,10,14,18,22,26,30,34,38,42,46,50,54,58,62 data

URB2<=Input(37);

PhaseInc2<=Input(36 downto 32);

Gain2<=Input(31 downto 28);

URB6<=Input(37);

PhaseInc6<=Input(36 downto 32);

Gain6<=Input(31 downto 28);

URB10<=Input(37);

PhaseInc10<=Input(36 downto 32);

Gain10<=Input(31 downto 28);

URB14<=Input(37);

PhaseInc14<=Input(36 downto 32);

Gain14<=Input(31 downto 28);

URB18<=Input(37);

PhaseInc18<=Input(36 downto 32);

Gain18<=Input(31 downto 28);                                                 

URB22<=Input(37);

PhaseInc22<=Input(36 downto 32);

Gain22<=Input(31 downto 28);

URB26<=Input(37);

PhaseInc26<=Input(36 downto 32);

Gain26<=Input(31 downto 28);

URB30<=Input(37);

PhaseInc30<=Input(36 downto 32);

Gain30<=Input(31 downto 28);

URB34<=Input(37);

PhaseInc34<=Input(36 downto 32);

Gain34<=Input(31 downto 28);                                                 

URB38<=Input(37);

PhaseInc38<=Input(36 downto 32);

Gain38<=Input(31 downto 28);

URB42<=Input(37);

PhaseInc42<=Input(36 downto 32);

Gain42<=Input(31 downto 28);

URB46<=Input(37);

PhaseInc46<=Input(36 downto 32);

Gain46<=Input(31 downto 28);

URB50<=Input(37);

PhaseInc50<=Input(36 downto 32);

Gain50<=Input(31 downto 28);                                                 

URB54<=Input(37);

PhaseInc54<=Input(36 downto 32);

Gain54<=Input(31 downto 28);

URB58<=Input(37);

PhaseInc58<=Input(36 downto 32);

Gain58<=Input(31 downto 28);

URB62<=Input(37);

PhaseInc62<=Input(36 downto 32);

Gain62<=Input(31 downto 28);

-- Bins 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63 data

URB3<=Input(47);

PhaseInc3<=Input(46 downto 42);

Gain3<=Input(41 downto 38);

URB7<=Input(47);

PhaseInc7<=Input(46 downto 42);

Gain7<=Input(41 downto 38);

URB11<=Input(47);

PhaseInc11<=Input(46 downto 42);

Gain11<=Input(41 downto 38);

URB15<=Input(47);

PhaseInc15<=Input(46 downto 42);

Gain15<=Input(41 downto 38);

URB19<=Input(47);

PhaseInc19<=Input(46 downto 42);

Gain19<=Input(41 downto 38);                                                 

URB23<=Input(47);

PhaseInc23<=Input(46 downto 42);

Gain23<=Input(41 downto 38);

URB27<=Input(47);

PhaseInc27<=Input(46 downto 42);

Gain27<=Input(41 downto 38);

URB31<=Input(47);

PhaseInc31<=Input(46 downto 42);

Gain31<=Input(41 downto 38);

URB35<=Input(47);

PhaseInc35<=Input(46 downto 42);

Gain35<=Input(41 downto 38);                                                 

URB39<=Input(47);

PhaseInc39<=Input(46 downto 42);

Gain39<=Input(41 downto 38);

URB43<=Input(47);

PhaseInc43<=Input(46 downto 42);

Gain43<=Input(41 downto 38);

URB47<=Input(47);

PhaseInc47<=Input(46 downto 42);

Gain47<=Input(41 downto 38);

URB51<=Input(47);

PhaseInc51<=Input(46 downto 42);

Gain51<=Input(41 downto 38);                                                 

URB55<=Input(47);

PhaseInc55<=Input(46 downto 42);

Gain55<=Input(41 downto 38);

URB59<=Input(47);

PhaseInc59<=Input(46 downto 42);

Gain59<=Input(41 downto 38);

URB63<=Input(47);

PhaseInc63<=Input(46 downto 42);

Gain63<=Input(41 downto 38);

 

DFF0: DFlipFlop port map (CLK, LD, RESET, PRB, PRB1, PRB1not);

DFF1: DFlipFlop port map (CLK, LD, RESET, PRB1, PRB2, PRB2not);

DFF2: DFlipFlop port map (CLK, LD, RESET, PRB2, PRB3, PRB3not);

DFF3: DFlipFlop port map (CLK, LD, RESET, PRB3, PRB4, PRB4not);

DFF4: DFlipFlop port map (CLK, LD, RESET, PRB4, PRB5, PRB5not);

DFF5: DFlipFlop port map (CLK, LD, RESET, PRB5, PRB6, PRB6not);

DFF6: DFlipFlop port map (CLK, LD, RESET, PRB6, PRB7, PRB7not);

DFF7: DFlipFlop port map (CLK, LD, RESET, PRB7, PRB8, PRB8not);

DFF8: DFlipFlop port map (CLK, LD, RESET, PRB8, PRB9, PRB9not);

DFF9: DFlipFlop port map (CLK, LD, RESET, PRB9, PRB10, PRB10not);

DFF10: DFlipFlop port map (CLK, LD, RESET, PRB10, PRB11, PRB11not);

DFF11: DFlipFlop port map (CLK, LD, RESET, PRB11, PRB12, PRB12not);

DFF12: DFlipFlop port map (CLK, LD, RESET, PRB12, PRB13, PRB13not);

DFF13: DFlipFlop port map (CLK, LD, RESET, PRB13, PRB14, PRB14not);

DFF14: DFlipFlop port map (CLK, LD, RESET, PRB14, PRB15, PRB15not);

 

BIN0: OneBin port map (DRFM1, PhaseInc0, Gain0, URB0, UNP, PRB, ODVout1, PSVout1, Q1, I1, Q, I, ODVout0, PSVout0, DRFM0, CLK);

BIN1: OneBin port map (DRFM2, PhaseInc1, Gain1, URB1, UNP, PRB, ODVout2, PSVout2, Q2, I2, Q1, I1, ODVout1, PSVout1, DRFM1, CLK);

BIN2: OneBin port map (DRFM3, PhaseInc2, Gain2, URB2, UNP, PRB, ODVout3, PSVout3, Q3, I3, Q2, I2, ODVout2, PSVout2, DRFM2, CLK);

BIN3: OneBin port map (DRFM4, PhaseInc3, Gain3, URB3, UNP, PRB, ODVout4, PSVout4, Q4, I4, Q3, I3, ODVout3, PSVout3, DRFM3, CLK);

BIN4: OneBin port map (DRFM5, PhaseInc4, Gain4, URB4, UNP, PRB1, ODVout5, PSVout5, Q5, I5, Q4, I4, ODVout4, PSVout4, DRFM4, CLK);

BIN5: OneBin port map (DRFM6, PhaseInc5, Gain5, URB5, UNP, PRB1, ODVout6, PSVout6, Q6, I6, Q5, I5, ODVout5, PSVout5, DRFM5, CLK);

BIN6: OneBin port map (DRFM7, PhaseInc6, Gain6, URB6, UNP, PRB1, ODVout7, PSVout7, Q7, I7, Q6, I6, ODVout6, PSVout6, DRFM6, CLK);

BIN7: OneBin port map (DRFM8, PhaseInc7, Gain7, URB7, UNP, PRB1, ODVout8, PSVout8, Q8, I8, Q7, I7, ODVout7, PSVout7, DRFM7, CLK);

BIN8: OneBin port map (DRFM9, PhaseInc8, Gain8, URB8, UNP, PRB2, ODVout9, PSVout9, Q9, I9, Q8, I8, ODVout8, PSVout8, DRFM8, CLK);

BIN9: OneBin port map (DRFM10, PhaseInc9, Gain9, URB9, UNP, PRB2, ODVout10, PSVout10, Q10, I10, Q9, I9, ODVout9, PSVout9, DRFM9, CLK);

BIN10: OneBin port map (DRFM11, PhaseInc10, Gain10, URB10, UNP, PRB2, ODVout11, PSVout11, Q11, I11, Q10, I10, ODVout10, PSVout10, DRFM10, CLK);

BIN11: OneBin port map (DRFM12, PhaseInc11, Gain11, URB11, UNP, PRB2, ODVout12, PSVout12, Q12, I12, Q11, I11, ODVout11, PSVout11, DRFM11, CLK);

BIN12: OneBin port map (DRFM13, PhaseInc12, Gain12, URB12, UNP, PRB3, ODVout13, PSVout13, Q13, I13, Q12, I12, ODVout12, PSVout12, DRFM12, CLK);

BIN13: OneBin port map (DRFM14, PhaseInc13, Gain13, URB13, UNP, PRB3, ODVout14, PSVout14, Q14, I14, Q13, I13, ODVout13, PSVout13, DRFM13, CLK);

BIN14: OneBin port map (DRFM15, PhaseInc14, Gain14, URB14, UNP, PRB3, ODVout15, PSVout15, Q15, I15, Q14, I14, ODVout14, PSVout14, DRFM14, CLK);

BIN15: OneBin port map (DRFM16, PhaseInc15, Gain15, URB15, UNP, PRB3, ODVout16, PSVout16, Q16, I16, Q15, I15, ODVout15, PSVout15, DRFM15, CLK);

BIN16: OneBin port map (DRFM17, PhaseInc16, Gain16, URB16, UNP, PRB4, ODVout17, PSVout17, Q17, I17, Q16, I16, ODVout16, PSVout16, DRFM16, CLK);

BIN17: OneBin port map (DRFM18, PhaseInc17, Gain17, URB17, UNP, PRB4, ODVout18, PSVout18, Q18, I18, Q17, I17, ODVout17, PSVout17, DRFM17, CLK);

BIN18: OneBin port map (DRFM19, PhaseInc18, Gain18, URB18, UNP, PRB4, ODVout19, PSVout19, Q19, I19, Q18, I18, ODVout18, PSVout18, DRFM18, CLK);

BIN19: OneBin port map (DRFM20, PhaseInc19, Gain19, URB19, UNP, PRB4, ODVout20, PSVout20, Q20, I20, Q19, I19, ODVout19, PSVout19, DRFM19, CLK);

BIN20: OneBin port map (DRFM21, PhaseInc20, Gain20, URB20, UNP, PRB5, ODVout21, PSVout21, Q21, I21, Q20, I20, ODVout20, PSVout20, DRFM20, CLK);

BIN21: OneBin port map (DRFM22, PhaseInc21, Gain21, URB21, UNP, PRB5, ODVout22, PSVout22, Q22, I22, Q21, I21, ODVout21, PSVout21, DRFM21, CLK);

BIN22: OneBin port map (DRFM23, PhaseInc22, Gain22, URB22, UNP, PRB5, ODVout23, PSVout23, Q23, I23, Q22, I22, ODVout22, PSVout22, DRFM22, CLK);

BIN23: OneBin port map (DRFM24, PhaseInc23, Gain23, URB23, UNP, PRB5, ODVout24, PSVout24, Q24, I24, Q23, I23, ODVout23, PSVout23, DRFM23, CLK);

BIN24: OneBin port map (DRFM25, PhaseInc24, Gain24, URB24, UNP, PRB6, ODVout25, PSVout25, Q25, I25, Q24, I24, ODVout24, PSVout24, DRFM24, CLK);

BIN25: OneBin port map (DRFM26, PhaseInc25, Gain25, URB25, UNP, PRB6, ODVout26, PSVout26, Q26, I26, Q25, I25, ODVout25, PSVout25, DRFM25, CLK);

BIN26: OneBin port map (DRFM27, PhaseInc26, Gain26, URB26, UNP, PRB6, ODVout27, PSVout27, Q27, I27, Q26, I26, ODVout26, PSVout26, DRFM26, CLK);

BIN27: OneBin port map (DRFM28, PhaseInc27, Gain27, URB27, UNP, PRB6, ODVout28, PSVout28, Q28, I28, Q27, I27, ODVout27, PSVout27, DRFM27, CLK);

BIN28: OneBin port map (DRFM29, PhaseInc28, Gain28, URB28, UNP, PRB7, ODVout29, PSVout29, Q29, I29, Q28, I28, ODVout28, PSVout28, DRFM28, CLK);

BIN29: OneBin port map (DRFM30, PhaseInc29, Gain29, URB29, UNP, PRB7, ODVout30, PSVout30, Q30, I30, Q29, I29, ODVout29, PSVout29, DRFM29, CLK);

BIN30: OneBin port map (DRFM31, PhaseInc30, Gain30, URB30, UNP, PRB7, ODVout31, PSVout31, Q31, I31, Q30, I30, ODVout30, PSVout30, DRFM30, CLK);

BIN31: OneBin port map (DRFM32, PhaseInc31, Gain31, URB31, UNP, PRB7, ODVout32, PSVout32, Q32, I32, Q31, I31, ODVout31, PSVout31, DRFM31, CLK);

BIN32: OneBin port map (DRFM33, PhaseInc32, Gain32, URB32, UNP, PRB8, ODVout33, PSVout33, Q33, I33, Q32, I32, ODVout32, PSVout32, DRFM32, CLK);

BIN33: OneBin port map (DRFM34, PhaseInc33, Gain33, URB33, UNP, PRB8, ODVout34, PSVout34, Q34, I34, Q33, I33, ODVout33, PSVout33, DRFM33, CLK);

BIN34: OneBin port map (DRFM35, PhaseInc34, Gain34, URB34, UNP, PRB8, ODVout35, PSVout35, Q35, I35, Q34, I34, ODVout34, PSVout34, DRFM34, CLK);

BIN35: OneBin port map (DRFM36, PhaseInc35, Gain35, URB35, UNP, PRB8, ODVout36, PSVout36, Q36, I36, Q35, I35, ODVout35, PSVout35, DRFM35, CLK);

BIN36: OneBin port map (DRFM37, PhaseInc36, Gain36, URB36, UNP, PRB9, ODVout37, PSVout37, Q37, I37, Q36, I36, ODVout36, PSVout36, DRFM36, CLK);

BIN37: OneBin port map (DRFM38, PhaseInc37, Gain37, URB37, UNP, PRB9, ODVout38, PSVout38, Q38, I38, Q37, I37, ODVout37, PSVout37, DRFM37, CLK);

BIN38: OneBin port map (DRFM39, PhaseInc38, Gain38, URB38, UNP, PRB9, ODVout39, PSVout39, Q39, I39, Q38, I38, ODVout38, PSVout38, DRFM38, CLK);

BIN39: OneBin port map (DRFM40, PhaseInc39, Gain39, URB39, UNP, PRB9, ODVout40, PSVout40, Q40, I40, Q39, I39, ODVout39, PSVout39, DRFM39, CLK);

BIN40: OneBin port map (DRFM41, PhaseInc40, Gain40, URB40, UNP, PRB10, ODVout41, PSVout41, Q41, I41, Q40, I40, ODVout40, PSVout40, DRFM40, CLK);

BIN41: OneBin port map (DRFM42, PhaseInc41, Gain41, URB41, UNP, PRB10, ODVout42, PSVout42, Q42, I42, Q41, I41, ODVout41, PSVout41, DRFM41, CLK);

BIN42: OneBin port map (DRFM43, PhaseInc42, Gain42, URB42, UNP, PRB10, ODVout43, PSVout43, Q43, I43, Q42, I42, ODVout42, PSVout42, DRFM42, CLK);

BIN43: OneBin port map (DRFM44, PhaseInc43, Gain43, URB43, UNP, PRB10, ODVout44, PSVout44, Q44, I44, Q43, I43, ODVout43, PSVout43, DRFM43, CLK);

BIN44: OneBin port map (DRFM45, PhaseInc44, Gain44, URB44, UNP, PRB11, ODVout45, PSVout45, Q45, I45, Q44, I44, ODVout44, PSVout44, DRFM44, CLK);

BIN45: OneBin port map (DRFM46, PhaseInc45, Gain45, URB45, UNP, PRB11, ODVout46, PSVout46, Q46, I46, Q45, I45, ODVout45, PSVout45, DRFM45, CLK);

BIN46: OneBin port map (DRFM47, PhaseInc46, Gain46, URB46, UNP, PRB11, ODVout47, PSVout47, Q47, I47, Q46, I46, ODVout46, PSVout46, DRFM46, CLK);

BIN47: OneBin port map (DRFM48, PhaseInc47, Gain47, URB47, UNP, PRB11, ODVout48, PSVout48, Q48, I48, Q47, I47, ODVout47, PSVout47, DRFM47, CLK);

BIN48: OneBin port map (DRFM49, PhaseInc48, Gain48, URB48, UNP, PRB12, ODVout49, PSVout49, Q49, I49, Q48, I48, ODVout48, PSVout48, DRFM48, CLK);

BIN49: OneBin port map (DRFM50, PhaseInc49, Gain49, URB49, UNP, PRB12, ODVout50, PSVout50, Q50, I50, Q49, I49, ODVout49, PSVout49, DRFM49, CLK);

BIN50: OneBin port map (DRFM51, PhaseInc50, Gain50, URB50, UNP, PRB12, ODVout51, PSVout51, Q51, I51, Q50, I50, ODVout50, PSVout50, DRFM50, CLK);

BIN51: OneBin port map (DRFM52, PhaseInc51, Gain51, URB51, UNP, PRB12, ODVout52, PSVout52, Q52, I52, Q51, I51, ODVout51, PSVout51, DRFM51, CLK);

BIN52: OneBin port map (DRFM53, PhaseInc52, Gain52, URB52, UNP, PRB13, ODVout53, PSVout53, Q53, I53, Q52, I52, ODVout52, PSVout52, DRFM52, CLK);

BIN53: OneBin port map (DRFM54, PhaseInc53, Gain53, URB53, UNP, PRB13, ODVout54, PSVout54, Q54, I54, Q53, I53, ODVout53, PSVout53, DRFM53, CLK);

BIN54: OneBin port map (DRFM55, PhaseInc54, Gain54, URB54, UNP, PRB13, ODVout55, PSVout55, Q55, I55, Q54, I54, ODVout54, PSVout54, DRFM54, CLK);

BIN55: OneBin port map (DRFM56, PhaseInc55, Gain55, URB55, UNP, PRB13, ODVout56, PSVout56, Q56, I56, Q55, I55, ODVout55, PSVout55, DRFM55, CLK);

BIN56: OneBin port map (DRFM57, PhaseInc56, Gain56, URB56, UNP, PRB14, ODVout57, PSVout57, Q57, I57, Q56, I56, ODVout56, PSVout56, DRFM56, CLK);

BIN57: OneBin port map (DRFM58, PhaseInc57, Gain57, URB57, UNP, PRB14, ODVout58, PSVout58, Q58, I58, Q57, I57, ODVout57, PSVout57, DRFM57, CLK);

BIN58: OneBin port map (DRFM59, PhaseInc58, Gain58, URB58, UNP, PRB14, ODVout59, PSVout59, Q59, I59, Q58, I58, ODVout58, PSVout58, DRFM58, CLK);

BIN59: OneBin port map (DRFM60, PhaseInc59, Gain59, URB59, UNP, PRB14, ODVout60, PSVout60, Q60, I60, Q59, I59, ODVout59, PSVout59, DRFM59, CLK);

BIN60: OneBin port map (DRFM61, PhaseInc60, Gain60, URB60, UNP, PRB15, ODVout61, PSVout61, Q61, I61, Q60, I60, ODVout60, PSVout60, DRFM60, CLK);

BIN61: OneBin port map (DRFM62, PhaseInc61, Gain61, URB61, UNP, PRB15, ODVout62, PSVout62, Q62, I62, Q61, I61, ODVout61, PSVout61, DRFM61, CLK);

BIN62: OneBin port map (DRFM63, PhaseInc62, Gain62, URB62, UNP, PRB15, ODVout63, PSVout63, Q63, I63, Q62, I62, ODVout62, PSVout62, DRFM62, CLK);

BIN63: OneBin port map (PhaseSamp, PhaseInc63, Gain63, URB63, UNP, PRB15, ODVin, PSVin, "00000000000000000", "00000000000000000", Q63, I63,ODVout63, PSVout63, DRFM63, CLK);     

 

-- Output Format:

-- 63-41 |   40   |   39   | 38-22 | 21-5 | 4-0

--unused | PSVout | ODVout |   Q   |   I  | DRFM

 

Output(40)<=PSVout0;

Output(39)<=ODVout0;

Output(38 downto 22)<=Q;

Output(21 downto 5)<=I;

Output(4 downto 0)<=DRFM0;

Output(63 downto 41)<="00000000000000000000000";

 

end SixtyFourBin;

 

E.   128 Bin macro vhdl

entity One28Bin is

port (Input: in bit_vector (63 downto 0);

Output:out bit_vector (63 downto 0); CLK: in bit);

end One28Bin;

 

architecture One28Bin of One28Bin is

 

component OneBin is

 

port (PhaseSamp, PhaseInc: in bit_vector (5 downto 1);

Gain: in bit_vector (4 downto 1);

URB, UNP, PRB, ODVin, PSVin: in bit;

OtherBinDataSIN,OtherBinDataCOS:in bit_vector (17 downto 1);

Q, I: out bit_vector (17 downto 1);

ODVout, PSVout: out bit;

DRFM: out bit_vector (5 downto 1);

CLK: in bit);

end component;

component DFlipFlop

port (CLK, LD, RESET, D: in bit;

Q: inout bit; Qnot: out bit);

end component;                                                                                                                                                                  

 

signal Q, I, Q1,I1,Q2,I2,Q3,I3,Q4,I4,Q5,I5,Q6,I6,Q7,I7,Q8,I8,Q9,I9,

Q10,I10,Q11,I11,Q12,I12,Q13,I13,Q14,I14,Q15,I15: bit_vector (17 downto 1):="00000000000000000";

signal Q16, I16, Q17,I17,Q18,I18,Q19,I19,Q20,I20,Q21,I21,Q22,I22,Q23,I23,Q24,I24,Q25,I25,

Q26,I26,Q27,I27,Q28,I28,Q29,I29,Q30,I30,Q31,I31: bit_vector (17 downto 1):="00000000000000000";

signal Q32, I32, Q33,I33,Q34,I34,Q35,I35,Q36,I36,Q37,I37,Q38,I38,Q39,I39,Q40,I40,Q41,I41,

Q42,I42,Q43,I43,Q44,I44,Q45,I45,Q46,I46,Q47,I47: bit_vector (17 downto 1):="00000000000000000";

signal Q48, I48, Q49,I49,Q50,I50,Q51,I51,Q52,I52,Q53,I53,Q54,I54,Q55,I55,Q56,I56,Q57,I57,

Q58,I58,Q59,I59,Q60,I60,Q61,I61,Q62,I62,Q63,I63: bit_vector (17 downto 1):="00000000000000000";

signal Q64, I64, Q65,I65,Q66,I66,Q67,I67,Q68,I68,Q69,I69,Q70,I70,Q71,I71,Q72,I72,Q73,I73,

Q74,I74,Q75,I75,Q76,I76,Q77,I77,Q78,I78,Q79,I79: bit_vector (17 downto 1):="00000000000000000";

signal Q80, I80, Q81,I81,Q82,I82,Q83,I83,Q84,I84,Q85,I85,Q86,I86,Q87,I87,Q88,I88,Q89,I89,

Q90,I90,Q91,I91,Q92,I92,Q93,I93,Q94,I94,Q95,I95: bit_vector (17 downto 1):="00000000000000000";

signal Q96, I96, Q97,I97,Q98,I98,Q99,I99,Q100,I100,Q101,I101,Q102,I102,Q103,I103,Q104,I104,Q105,I105,

Q106,I106,Q107,I107,Q108,I108,Q109,I109,Q110,I110,Q111,I111: bit_vector (17 downto 1):="00000000000000000";                                                     

signal Q112, I112, Q113,I113,Q114,I114,Q115,I115,Q116,I116,Q117,I117,Q118,I118,Q119,I119,Q120,I120,Q121,I121,

Q122,I122,Q123,I123,Q124,I124,Q125,I125,Q126,I126,Q127,I127: bit_vector (17 downto 1):="00000000000000000";

 

signal DRFM0,DRFM1,DRFM2,DRFM3,DRFM4,DRFM5,DRFM6,DRFM7,DRFM8,DRFM9,

DRFM10,DRFM11,DRFM12,DRFM13,DRFM14,DRFM15: bit_vector (5 downto 1):="00000";

signal DRFM16,DRFM17,DRFM18,DRFM19,DRFM20,DRFM21,DRFM22,DRFM23,DRFM24,DRFM25,

DRFM26,DRFM27,DRFM28,DRFM29,DRFM30,DRFM31: bit_vector (5 downto 1):="00000";

signal DRFM32,DRFM33,DRFM34,DRFM35,DRFM36,DRFM37,DRFM38,DRFM39,DRFM40,DRFM41,

DRFM42,DRFM43,DRFM44,DRFM45,DRFM46,DRFM47: bit_vector (5 downto 1):="00000";

signal DRFM48,DRFM49,DRFM50,DRFM51,DRFM52,DRFM53,DRFM54,DRFM55,DRFM56,DRFM57,

DRFM58,DRFM59,DRFM60,DRFM61,DRFM62,DRFM63: bit_vector (5 downto 1):="00000";

signal DRFM64,DRFM65,DRFM66,DRFM67,DRFM68,DRFM69,DRFM70,DRFM71,DRFM72,DRFM73,

DRFM74,DRFM75,DRFM76,DRFM77,DRFM78,DRFM79: bit_vector (5 downto 1):="00000";

signal DRFM80,DRFM81,DRFM82,DRFM83,DRFM84,DRFM85,DRFM86,DRFM87,DRFM88,DRFM89,

DRFM90,DRFM91,DRFM92,DRFM93,DRFM94,DRFM95: bit_vector (5 downto 1):="00000";

signal DRFM96,DRFM97,DRFM98,DRFM99,DRFM100,DRFM101,DRFM102,DRFM103,DRFM104,DRFM105,

DRFM106,DRFM107,DRFM108,DRFM109,DRFM110,DRFM111: bit_vector (5 downto 1):="00000";

signal DRFM112,DRFM113,DRFM114,DRFM115,DRFM116,DRFM117,DRFM118,DRFM119,DRFM120,DRFM121,

DRFM122,DRFM123,DRFM124,DRFM125,DRFM126,DRFM127: bit_vector (5 downto 1):="00000";

 

signal PSVout0,PSVout1,PSVout2,PSVout3,PSVout4,PSVout5,PSVout6,

PSVout7,PSVout8,PSVout9,PSVout10,PSVout11,PSVout12,PSVout13,PSVout14,PSVout15: bit:='0';

signal PSVout16,PSVout17,PSVout18,PSVout19,PSVout20,PSVout21,PSVout22,

PSVout23,PSVout24,PSVout25,PSVout26,PSVout27,PSVout28,PSVout29,PSVout30,PSVout31: bit:='0';

signal PSVout32,PSVout33,PSVout34,PSVout35,PSVout36,PSVout37,PSVout38,

PSVout39,PSVout40,PSVout41,PSVout42,PSVout43,PSVout44,PSVout45,PSVout46,PSVout47: bit:='0';

signal PSVout48,PSVout49,PSVout50,PSVout51,PSVout52,PSVout53,PSVout54,

PSVout55,PSVout56,PSVout57,PSVout58,PSVout59,PSVout60,PSVout61,PSVout62,PSVout63: bit:='0';

signal PSVout64,PSVout65,PSVout66,PSVout67,PSVout68,PSVout69,PSVout70,

PSVout71,PSVout72,PSVout73,PSVout74,PSVout75,PSVout76,PSVout77,PSVout78,PSVout79: bit:='0';

signal PSVout80,PSVout81,PSVout82,PSVout83,PSVout84,PSVout85,PSVout86,

PSVout87,PSVout88,PSVout89,PSVout90,PSVout91,PSVout92,PSVout93,PSVout94,PSVout95: bit:='0';

signal PSVout96,PSVout97,PSVout98,PSVout99,PSVout100,PSVout101,PSVout102,

PSVout103,PSVout104,PSVout105,PSVout106,PSVout107,PSVout108,PSVout109,PSVout110,PSVout111: bit:='0';

signal PSVout112,PSVout113,PSVout114,PSVout115,PSVout116,PSVout117,PSVout118,

PSVout119,PSVout120,PSVout121,PSVout122,PSVout123,PSVout124,PSVout125,PSVout126,PSVout127: bit:='0';

 

signal ODVout0,ODVout1,ODVout2,ODVout3,ODVout4,ODVout5,ODVout6,

ODVout7,ODVout8,ODVout9,ODVout10,ODVout11,ODVout12,ODVout13,ODVout14,ODVout15: bit:='0';

signal ODVout16,ODVout17,ODVout18,ODVout19,ODVout20,ODVout21,ODVout22,

ODVout23,ODVout24,ODVout25,ODVout26,ODVout27,ODVout28,ODVout29,ODVout30,ODVout31: bit:='0';

signal ODVout32,ODVout33,ODVout34,ODVout35,ODVout36,ODVout37,ODVout38,

ODVout39,ODVout40,ODVout41,ODVout42,ODVout43,ODVout44,ODVout45,ODVout46,ODVout47: bit:='0';

signal ODVout48,ODVout49,ODVout50,ODVout51,ODVout52,ODVout53,ODVout54,

ODVout55,ODVout56,ODVout57,ODVout58,ODVout59,ODVout60,ODVout61,ODVout62,ODVout63: bit:='0';

signal ODVout64,ODVout65,ODVout66,ODVout67,ODVout68,ODVout69,ODVout70,

ODVout71,ODVout72,ODVout73,ODVout74,ODVout75,ODVout76,ODVout77,ODVout78,ODVout79: bit:='0';

signal ODVout80,ODVout81,ODVout82,ODVout83,ODVout84,ODVout85,ODVout86,

ODVout87,ODVout88,ODVout89,ODVout90,ODVout91,ODVout92,ODVout93,ODVout94,ODVout95: bit:='0';

signal ODVout96,ODVout97,ODVout98,ODVout99,ODVout100,ODVout101,ODVout102,

ODVout103,ODVout104,ODVout105,ODVout106,ODVout107,ODVout108,ODVout109,ODVout110,ODVout111: bit:='0';

signal ODVout112,ODVout113,ODVout114,ODVout115,ODVout116,ODVout117,ODVout118,

ODVout119,ODVout120,ODVout121,ODVout122,ODVout123,ODVout124,ODVout125,ODVout126,ODVout127: bit:='0';

                                                                             

signal Gain0,Gain1,Gain2,Gain3,Gain4,Gain5,Gain6,Gain7,Gain8,Gain9,

Gain10,Gain11,Gain12,Gain13,Gain14,Gain15: bit_vector (4 downto 1):="0000";

signal Gain16,Gain17,Gain18,Gain19,Gain20,Gain21,Gain22,Gain23,Gain24,Gain25,

Gain26,Gain27,Gain28,Gain29,Gain30,Gain31: bit_vector (4 downto 1):="0000";

signal Gain32,Gain33,Gain34,Gain35,Gain36,Gain37,Gain38,Gain39,Gain40,Gain41,

Gain42,Gain43,Gain44,Gain45,Gain46,Gain47: bit_vector (4 downto 1):="0000";

signal Gain48,Gain49,Gain50,Gain51,Gain52,Gain53,Gain54,Gain55,Gain56,Gain57,

Gain58,Gain59,Gain60,Gain61,Gain62,Gain63: bit_vector (4 downto 1):="0000";

signal Gain64,Gain65,Gain66,Gain67,Gain68,Gain69,Gain70,Gain71,Gain72,Gain73,

Gain74,Gain75,Gain76,Gain77,Gain78,Gain79: bit_vector (4 downto 1):="0000";

signal Gain80,Gain81,Gain82,Gain83,Gain84,Gain85,Gain86,Gain87,Gain88,Gain89,

Gain90,Gain91,Gain92,Gain93,Gain94,Gain95: bit_vector (4 downto 1):="0000";

signal Gain96,Gain97,Gain98,Gain99,Gain100,Gain101,Gain102,Gain103,Gain104,Gain105,

Gain106,Gain107,Gain108,Gain109,Gain110,Gain111: bit_vector (4 downto 1):="0000";

signal Gain112,Gain113,Gain114,Gain115,Gain116,Gain117,Gain118,Gain119,Gain120,Gain121,

Gain122,Gain123,Gain124,Gain125,Gain126,Gain127: bit_vector (4 downto 1):="0000";

 

signal PhaseInc0,PhaseInc1,PhaseInc2,PhaseInc3,PhaseInc4,PhaseInc5,PhaseInc6,PhaseInc7,

PhaseInc8,PhaseInc9,PhaseInc10,PhaseInc11,PhaseInc12,PhaseInc13,PhaseInc14,PhaseInc15 : bit_vector (5 downto 1):="00000";

signal PhaseInc16,PhaseInc17,PhaseInc18,PhaseInc19,PhaseInc20,PhaseInc21,PhaseInc22,PhaseInc23,

PhaseInc24,PhaseInc25,PhaseInc26,PhaseInc27,PhaseInc28,PhaseInc29,PhaseInc30,PhaseInc31 : bit_vector (5 downto 1):="00000";

signal PhaseInc32,PhaseInc33,PhaseInc34,PhaseInc35,PhaseInc36,PhaseInc37,PhaseInc38,PhaseInc39,

PhaseInc40,PhaseInc41,PhaseInc42,PhaseInc43,PhaseInc44,PhaseInc45,PhaseInc46,PhaseInc47 : bit_vector (5 downto 1):="00000";

signal PhaseInc48,PhaseInc49,PhaseInc50,PhaseInc51,PhaseInc52,PhaseInc53,PhaseInc54,PhaseInc55,

PhaseInc56,PhaseInc57,PhaseInc58,PhaseInc59,PhaseInc60,PhaseInc61,PhaseInc62,PhaseInc63 : bit_vector (5 downto 1):="00000";                                            

signal PhaseInc64,PhaseInc65,PhaseInc66,PhaseInc67,PhaseInc68,PhaseInc69,PhaseInc70,PhaseInc71,

PhaseInc72,PhaseInc73,PhaseInc74,PhaseInc75,PhaseInc76,PhaseInc77,PhaseInc78,PhaseInc79 : bit_vector (5 downto 1):="00000";

signal PhaseInc80,PhaseInc81,PhaseInc82,PhaseInc83,PhaseInc84,PhaseInc85,PhaseInc86,PhaseInc87,

PhaseInc88,PhaseInc89,PhaseInc90,PhaseInc91,PhaseInc92,PhaseInc93,PhaseInc94,PhaseInc95 : bit_vector (5 downto 1):="00000";

signal PhaseInc96,PhaseInc97,PhaseInc98,PhaseInc99,PhaseInc100,PhaseInc101,PhaseInc102,PhaseInc103,

PhaseInc104,PhaseInc105,PhaseInc106,PhaseInc107,PhaseInc108,PhaseInc109,PhaseInc110,PhaseInc111 : bit_vector (5 downto 1):="00000";

signal PhaseInc112,PhaseInc113,PhaseInc114,PhaseInc115,PhaseInc116,PhaseInc117,PhaseInc118,PhaseInc119,

PhaseInc120,PhaseInc121,PhaseInc122,PhaseInc123,PhaseInc124,PhaseInc125,PhaseInc126,PhaseInc127 : bit_vector (5 downto 1):="00000";                                       

 

signal URB0,URB1,URB2,URB3,URB4,URB5,URB6,URB7,URB8,URB9,URB10,URB11,URB12,URB13,URB14,URB15: bit :='0';

signal URB16,URB17,URB18,URB19,URB20,URB21,URB22,URB23,URB24,URB25,URB26,URB27,URB28,URB29,URB30,URB31: bit :='0';

signal URB32,URB33,URB34,URB35,URB36,URB37,URB38,URB39,URB40,URB41,URB42,URB43,URB44,URB45,URB46,URB47: bit :='0';

signal URB48,URB49,URB50,URB51,URB52,URB53,URB54,URB55,URB56,URB57,URB58,URB59,URB60,URB61,URB62,URB63: bit :='0';

signal URB64,URB65,URB66,URB67,URB68,URB69,URB70,URB71,URB72,URB73,URB74,URB75,URB76,URB77,URB78,URB79: bit :='0';

signal URB80,URB81,URB82,URB83,URB84,URB85,URB86,URB87,URB88,URB89,URB90,URB91,URB92,URB93,URB94,URB95: bit :='0';

signal URB96,URB97,URB98,URB99,URB100,URB101,URB102,URB103,URB104,URB105,URB106,URB107,URB108,URB109,URB110,URB111: bit :='0';

signal URB112,URB113,URB114,URB115,URB116,URB117,URB118,URB119,URB120,URB121,URB122,URB123,URB124,URB125,URB126,URB127: bit :='0';

 

signal PhaseSamp: bit_vector (5 downto 1):= "00000";

signal UNP, PSVin, ODVin: bit :='0';

signal LD, RESET, PRB, PRB1, PRB2, PRB3, PRB4, PRB5, PRB6, PRB7, PRB8, PRB9, PRB10, PRB11, PRB12, PRB13, PRB14, PRB15,

PRB16, PRB17, PRB18, PRB19, PRB20, PRB21, PRB22, PRB23, PRB24, PRB25, PRB26, PRB27, PRB28, PRB29, PRB30, PRB31,

PRB1not,PRB2not,PRB3not,PRB4not,PRB5not,PRB6not,PRB7not,PRB8not,PRB9not,PRB10not,PRB11not,PRB12not,PRB13not,PRB14not,PRB15not,

PRB16not,PRB17not,PRB18not,PRB19not,PRB20not,PRB21not,PRB22not,PRB23not,PRB24not,PRB25not,PRB26not,PRB27not,

PRB28not,PRB29not,PRB30not,PRB31not:bit;

 

Begin -- BIN0 is the primary output

--Input: formats, cycle begins when PRB=1, 1 format per clock

-- ten bits of each bin: 10 |  9-5   |4-1 |

--                                                                                        URB|PhaseInc|Gain|

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

-- 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

--unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

-- 63-8                              | 7-3   | 2    | 1  | 0

--unused                             |sample |PSVin |UNP |PRB

-- more bins in same pattern up to 128...

-- The first sample can be entered on clock 129 if PSVin and UNP are taken high

LD<='1';

RESET<='0';

PRB<=Input(0);

UNP<=Input(1);

PSVin<=Input(2);

PhaseSamp<=Input(7 downto 3);

-- Bins 0,4,8,12,16,20,24,28,32,36,40,44,48,52,56,60...124 data

URB0<=Input(17);

PhaseInc0<=Input(16 downto 12);

Gain0<=Input(11 downto 8);

URB4<=Input(17);

PhaseInc4<=Input(16 downto 12);

Gain4<=Input(11 downto 8);

URB8<=Input(17);

PhaseInc8<=Input(16 downto 12);

Gain8<=Input(11 downto 8);

URB12<=Input(17);

PhaseInc12<=Input(16 downto 12);

Gain12<=Input(11 downto 8);

URB16<=Input(17);

PhaseInc16<=Input(16 downto 12);

Gain16<=Input(11 downto 8);

URB20<=Input(17);

PhaseInc20<=Input(16 downto 12);

Gain20<=Input(11 downto 8);

URB24<=Input(17);

PhaseInc24<=Input(16 downto 12);

Gain24<=Input(11 downto 8);

URB28<=Input(17);

PhaseInc28<=Input(16 downto 12);

Gain28<=Input(11 downto 8);

URB32<=Input(17);

PhaseInc32<=Input(16 downto 12);

Gain32<=Input(11 downto 8);

URB36<=Input(17);

PhaseInc36<=Input(16 downto 12);

Gain36<=Input(11 downto 8);

URB40<=Input(17);

PhaseInc40<=Input(16 downto 12);

Gain40<=Input(11 downto 8);

URB44<=Input(17);

PhaseInc44<=Input(16 downto 12);

Gain44<=Input(11 downto 8);

URB48<=Input(17);

PhaseInc48<=Input(16 downto 12);

Gain48<=Input(11 downto 8);

URB52<=Input(17);

PhaseInc52<=Input(16 downto 12);

Gain52<=Input(11 downto 8);

URB56<=Input(17);

PhaseInc56<=Input(16 downto 12);

Gain56<=Input(11 downto 8);

URB60<=Input(17);

PhaseInc60<=Input(16 downto 12);

Gain60<=Input(11 downto 8);

URB64<=Input(17);

PhaseInc64<=Input(16 downto 12);

Gain64<=Input(11 downto 8);

URB68<=Input(17);

PhaseInc68<=Input(16 downto 12);

Gain68<=Input(11 downto 8);

URB72<=Input(17);

PhaseInc72<=Input(16 downto 12);

Gain72<=Input(11 downto 8);

URB76<=Input(17);

PhaseInc76<=Input(16 downto 12);

Gain76<=Input(11 downto 8);

URB80<=Input(17);

PhaseInc80<=Input(16 downto 12);

Gain80<=Input(11 downto 8);

URB84<=Input(17);

PhaseInc84<=Input(16 downto 12);

Gain84<=Input(11 downto 8);

URB88<=Input(17);

PhaseInc88<=Input(16 downto 12);

Gain88<=Input(11 downto 8);

URB92<=Input(17);

PhaseInc92<=Input(16 downto 12);

Gain92<=Input(11 downto 8);

URB96<=Input(17);

PhaseInc96<=Input(16 downto 12);

Gain96<=Input(11 downto 8);

URB100<=Input(17);

PhaseInc100<=Input(16 downto 12);

Gain100<=Input(11 downto 8);

URB104<=Input(17);

PhaseInc104<=Input(16 downto 12);

Gain104<=Input(11 downto 8);

URB108<=Input(17);

PhaseInc108<=Input(16 downto 12);

Gain108<=Input(11 downto 8);

URB112<=Input(17);

PhaseInc112<=Input(16 downto 12);

Gain112<=Input(11 downto 8);

URB116<=Input(17);

PhaseInc116<=Input(16 downto 12);

Gain116<=Input(11 downto 8);

URB120<=Input(17);

PhaseInc120<=Input(16 downto 12);

Gain120<=Input(11 downto 8);

URB124<=Input(17);

PhaseInc124<=Input(16 downto 12);

Gain124<=Input(11 downto 8);

 

-- Bins 1,5,9,13,17,21,25,29,33,37,41,45,49,53,57,61...125 data

URB1<=Input(27);

PhaseInc1<=Input(26 downto 22);

Gain1<=Input(21 downto 18);                                                  

URB5<=Input(27);

PhaseInc5<=Input(26 downto 22);

Gain5<=Input(21 downto 18);

URB9<=Input(27);

PhaseInc9<=Input(26 downto 22);

Gain9<=Input(21 downto 18);

URB13<=Input(27);

PhaseInc13<=Input(26 downto 22);

Gain13<=Input(21 downto 18);

URB17<=Input(27);

PhaseInc17<=Input(26 downto 22);

Gain17<=Input(21 downto 18);                                                 

URB21<=Input(27);

PhaseInc21<=Input(26 downto 22);

Gain21<=Input(21 downto 18);

URB25<=Input(27);

PhaseInc25<=Input(26 downto 22);

Gain25<=Input(21 downto 18);

URB29<=Input(27);

PhaseInc29<=Input(26 downto 22);

Gain29<=Input(21 downto 18);

URB33<=Input(27);

PhaseInc33<=Input(26 downto 22);

Gain33<=Input(21 downto 18);                                                 

URB37<=Input(27);

PhaseInc37<=Input(26 downto 22);

Gain37<=Input(21 downto 18);

URB41<=Input(27);

PhaseInc41<=Input(26 downto 22);

Gain41<=Input(21 downto 18);

URB45<=Input(27);

PhaseInc45<=Input(26 downto 22);

Gain45<=Input(21 downto 18);

URB49<=Input(27);

PhaseInc49<=Input(26 downto 22);

Gain49<=Input(21 downto 18);                                                 

URB53<=Input(27);

PhaseInc53<=Input(26 downto 22);

Gain53<=Input(21 downto 18);

URB57<=Input(27);

PhaseInc57<=Input(26 downto 22);

Gain57<=Input(21 downto 18);

URB61<=Input(27);

PhaseInc61<=Input(26 downto 22);

Gain61<=Input(21 downto 18);

URB65<=Input(27);

PhaseInc65<=Input(26 downto 22);

Gain65<=Input(21 downto 18);                                                 

URB69<=Input(27);

PhaseInc69<=Input(26 downto 22);

Gain69<=Input(21 downto 18);

URB73<=Input(27);

PhaseInc73<=Input(26 downto 22);

Gain73<=Input(21 downto 18);

URB77<=Input(27);

PhaseInc77<=Input(26 downto 22);

Gain77<=Input(21 downto 18);

URB81<=Input(27);

PhaseInc81<=Input(26 downto 22);

Gain81<=Input(21 downto 18);                                                 

URB85<=Input(27);

PhaseInc85<=Input(26 downto 22);

Gain85<=Input(21 downto 18);

URB89<=Input(27);

PhaseInc89<=Input(26 downto 22);

Gain89<=Input(21 downto 18);

URB93<=Input(27);

PhaseInc93<=Input(26 downto 22);

Gain93<=Input(21 downto 18);

URB97<=Input(27);

PhaseInc97<=Input(26 downto 22);

Gain97<=Input(21 downto 18);                                                 

URB101<=Input(27);

PhaseInc101<=Input(26 downto 22);

Gain101<=Input(21 downto 18);

URB105<=Input(27);

PhaseInc105<=Input(26 downto 22);

Gain105<=Input(21 downto 18);

URB109<=Input(27);

PhaseInc109<=Input(26 downto 22);

Gain109<=Input(21 downto 18);

URB113<=Input(27);

PhaseInc113<=Input(26 downto 22);

Gain113<=Input(21 downto 18);                                                

URB117<=Input(27);

PhaseInc117<=Input(26 downto 22);

Gain117<=Input(21 downto 18);

URB121<=Input(27);

PhaseInc121<=Input(26 downto 22);

Gain121<=Input(21 downto 18);

URB125<=Input(27);

PhaseInc125<=Input(26 downto 22);

Gain125<=Input(21 downto 18);

 

-- Bins 2,6,10,14,18,22,26,30,34,38,42,46,50,54,58,62...126 data

URB2<=Input(37);

PhaseInc2<=Input(36 downto 32);

Gain2<=Input(31 downto 28);

URB6<=Input(37);

PhaseInc6<=Input(36 downto 32);

Gain6<=Input(31 downto 28);

URB10<=Input(37);

PhaseInc10<=Input(36 downto 32);

Gain10<=Input(31 downto 28);

URB14<=Input(37);

PhaseInc14<=Input(36 downto 32);

Gain14<=Input(31 downto 28);

URB18<=Input(37);

PhaseInc18<=Input(36 downto 32);

Gain18<=Input(31 downto 28);                                                 

URB22<=Input(37);

PhaseInc22<=Input(36 downto 32);

Gain22<=Input(31 downto 28);

URB26<=Input(37);

PhaseInc26<=Input(36 downto 32);

Gain26<=Input(31 downto 28);

URB30<=Input(37);

PhaseInc30<=Input(36 downto 32);

Gain30<=Input(31 downto 28);

URB34<=Input(37);

PhaseInc34<=Input(36 downto 32);

Gain34<=Input(31 downto 28);                                                 

URB38<=Input(37);

PhaseInc38<=Input(36 downto 32);

Gain38<=Input(31 downto 28);

URB42<=Input(37);

PhaseInc42<=Input(36 downto 32);

Gain42<=Input(31 downto 28);

URB46<=Input(37);

PhaseInc46<=Input(36 downto 32);

Gain46<=Input(31 downto 28);

URB50<=Input(37);

PhaseInc50<=Input(36 downto 32);

Gain50<=Input(31 downto 28);                                                 

URB54<=Input(37);

PhaseInc54<=Input(36 downto 32);

Gain54<=Input(31 downto 28);

URB58<=Input(37);

PhaseInc58<=Input(36 downto 32);

Gain58<=Input(31 downto 28);

URB62<=Input(37);

PhaseInc62<=Input(36 downto 32);

Gain62<=Input(31 downto 28);

URB66<=Input(37);

PhaseInc66<=Input(36 downto 32);

Gain66<=Input(31 downto 28);

URB70<=Input(37);

PhaseInc70<=Input(36 downto 32);

Gain70<=Input(31 downto 28);

URB74<=Input(37);

PhaseInc74<=Input(36 downto 32);

Gain74<=Input(31 downto 28);

URB78<=Input(37);

PhaseInc78<=Input(36 downto 32);

Gain78<=Input(31 downto 28);

URB82<=Input(37);

PhaseInc82<=Input(36 downto 32);

Gain82<=Input(31 downto 28);                                                 

URB86<=Input(37);

PhaseInc86<=Input(36 downto 32);

Gain86<=Input(31 downto 28);

URB90<=Input(37);

PhaseInc90<=Input(36 downto 32);

Gain90<=Input(31 downto 28);

URB94<=Input(37);

PhaseInc94<=Input(36 downto 32);

Gain94<=Input(31 downto 28);

URB98<=Input(37);

PhaseInc98<=Input(36 downto 32);

Gain98<=Input(31 downto 28);                                                 

URB102<=Input(37);

PhaseInc102<=Input(36 downto 32);

Gain102<=Input(31 downto 28);

URB106<=Input(37);

PhaseInc106<=Input(36 downto 32);

Gain106<=Input(31 downto 28);

URB110<=Input(37);

PhaseInc110<=Input(36 downto 32);

Gain110<=Input(31 downto 28);

URB114<=Input(37);

PhaseInc114<=Input(36 downto 32);

Gain114<=Input(31 downto 28);                                                

URB118<=Input(37);

PhaseInc118<=Input(36 downto 32);

Gain118<=Input(31 downto 28);

URB122<=Input(37);

PhaseInc122<=Input(36 downto 32);

Gain122<=Input(31 downto 28);

URB126<=Input(37);

PhaseInc126<=Input(36 downto 32);

Gain126<=Input(31 downto 28);

 

-- Bins 3,7,11,15,19,23,27,31,35,39,43,47,51,55,59,63...127 data

URB3<=Input(47);

PhaseInc3<=Input(46 downto 42);

Gain3<=Input(41 downto 38);

URB7<=Input(47);

PhaseInc7<=Input(46 downto 42);

Gain7<=Input(41 downto 38);

URB11<=Input(47);

PhaseInc11<=Input(46 downto 42);

Gain11<=Input(41 downto 38);

URB15<=Input(47);

PhaseInc15<=Input(46 downto 42);

Gain15<=Input(41 downto 38);

URB19<=Input(47);

PhaseInc19<=Input(46 downto 42);

Gain19<=Input(41 downto 38);                                                 

URB23<=Input(47);

PhaseInc23<=Input(46 downto 42);

Gain23<=Input(41 downto 38);

URB27<=Input(47);

PhaseInc27<=Input(46 downto 42);

Gain27<=Input(41 downto 38);

URB31<=Input(47);

PhaseInc31<=Input(46 downto 42);

Gain31<=Input(41 downto 38);

URB35<=Input(47);

PhaseInc35<=Input(46 downto 42);

Gain35<=Input(41 downto 38);                                                 

URB39<=Input(47);

PhaseInc39<=Input(46 downto 42);

Gain39<=Input(41 downto 38);

URB43<=Input(47);

PhaseInc43<=Input(46 downto 42);

Gain43<=Input(41 downto 38);

URB47<=Input(47);

PhaseInc47<=Input(46 downto 42);

Gain47<=Input(41 downto 38);

URB51<=Input(47);

PhaseInc51<=Input(46 downto 42);

Gain51<=Input(41 downto 38);                                                 

URB55<=Input(47);

PhaseInc55<=Input(46 downto 42);

Gain55<=Input(41 downto 38);

URB59<=Input(47);

PhaseInc59<=Input(46 downto 42);

Gain59<=Input(41 downto 38);

URB63<=Input(47);

PhaseInc63<=Input(46 downto 42);

Gain63<=Input(41 downto 38);

URB67<=Input(47);

PhaseInc67<=Input(46 downto 42);

Gain67<=Input(41 downto 38);

URB71<=Input(47);

PhaseInc71<=Input(46 downto 42);

Gain71<=Input(41 downto 38);

URB75<=Input(47);

PhaseInc75<=Input(46 downto 42);

Gain75<=Input(41 downto 38);

URB79<=Input(47);

PhaseInc79<=Input(46 downto 42);

Gain79<=Input(41 downto 38);

URB83<=Input(47);

PhaseInc83<=Input(46 downto 42);

Gain83<=Input(41 downto 38);                                                 

URB87<=Input(47);

PhaseInc87<=Input(46 downto 42);

Gain87<=Input(41 downto 38);

URB91<=Input(47);

PhaseInc91<=Input(46 downto 42);

Gain91<=Input(41 downto 38);

URB95<=Input(47);

PhaseInc95<=Input(46 downto 42);

Gain95<=Input(41 downto 38);

URB99<=Input(47);

PhaseInc99<=Input(46 downto 42);

Gain99<=Input(41 downto 38);                                                 

URB103<=Input(47);

PhaseInc103<=Input(46 downto 42);

Gain103<=Input(41 downto 38);

URB107<=Input(47);

PhaseInc107<=Input(46 downto 42);

Gain107<=Input(41 downto 38);

URB111<=Input(47);

PhaseInc111<=Input(46 downto 42);

Gain111<=Input(41 downto 38);

URB115<=Input(47);

PhaseInc115<=Input(46 downto 42);

Gain115<=Input(41 downto 38);                                                

URB119<=Input(47);

PhaseInc119<=Input(46 downto 42);

Gain119<=Input(41 downto 38);

URB123<=Input(47);

PhaseInc123<=Input(46 downto 42);

Gain123<=Input(41 downto 38);

URB127<=Input(47);

PhaseInc127<=Input(46 downto 42);

Gain127<=Input(41 downto 38);

 

DFF0: DFlipFlop port map (CLK, LD, RESET, PRB, PRB1, PRB1not);

DFF1: DFlipFlop port map (CLK, LD, RESET, PRB1, PRB2, PRB2not);

DFF2: DFlipFlop port map (CLK, LD, RESET, PRB2, PRB3, PRB3not);

DFF3: DFlipFlop port map (CLK, LD, RESET, PRB3, PRB4, PRB4not);

DFF4: DFlipFlop port map (CLK, LD, RESET, PRB4, PRB5, PRB5not);

DFF5: DFlipFlop port map (CLK, LD, RESET, PRB5, PRB6, PRB6not);

DFF6: DFlipFlop port map (CLK, LD, RESET, PRB6, PRB7, PRB7not);

DFF7: DFlipFlop port map (CLK, LD, RESET, PRB7, PRB8, PRB8not);

DFF8: DFlipFlop port map (CLK, LD, RESET, PRB8, PRB9, PRB9not);

DFF9: DFlipFlop port map (CLK, LD, RESET, PRB9, PRB10, PRB10not);

DFF10: DFlipFlop port map (CLK, LD, RESET, PRB10, PRB11, PRB11not);

DFF11: DFlipFlop port map (CLK, LD, RESET, PRB11, PRB12, PRB12not);

DFF12: DFlipFlop port map (CLK, LD, RESET, PRB12, PRB13, PRB13not);

DFF13: DFlipFlop port map (CLK, LD, RESET, PRB13, PRB14, PRB14not);

DFF14: DFlipFlop port map (CLK, LD, RESET, PRB14, PRB15, PRB15not);

DFF15: DFlipFlop port map (CLK, LD, RESET, PRB15, PRB16, PRB16not);

DFF16: DFlipFlop port map (CLK, LD, RESET, PRB16, PRB17, PRB17not);

DFF17: DFlipFlop port map (CLK, LD, RESET, PRB17, PRB18, PRB18not);

DFF18: DFlipFlop port map (CLK, LD, RESET, PRB18, PRB19, PRB19not);

DFF19: DFlipFlop port map (CLK, LD, RESET, PRB19, PRB20, PRB20not);

DFF20: DFlipFlop port map (CLK, LD, RESET, PRB20, PRB21, PRB21not);

DFF21: DFlipFlop port map (CLK, LD, RESET, PRB21, PRB22, PRB22not);

DFF22: DFlipFlop port map (CLK, LD, RESET, PRB22, PRB23, PRB23not);

DFF23: DFlipFlop port map (CLK, LD, RESET, PRB23, PRB24, PRB24not);

DFF24: DFlipFlop port map (CLK, LD, RESET, PRB24, PRB25, PRB25not);

DFF25: DFlipFlop port map (CLK, LD, RESET, PRB25, PRB26, PRB26not);

DFF26: DFlipFlop port map (CLK, LD, RESET, PRB26, PRB27, PRB27not);

DFF27: DFlipFlop port map (CLK, LD, RESET, PRB27, PRB28, PRB28not);

DFF28: DFlipFlop port map (CLK, LD, RESET, PRB28, PRB29, PRB29not);

DFF29: DFlipFlop port map (CLK, LD, RESET, PRB29, PRB30, PRB30not);

DFF30: DFlipFlop port map (CLK, LD, RESET, PRB30, PRB31, PRB31not);

 

BIN0: OneBin port map (DRFM1, PhaseInc0, Gain0, URB0, UNP, PRB, ODVout1, PSVout1, Q1, I1, Q, I, ODVout0, PSVout0, DRFM0, CLK);

BIN1: OneBin port map (DRFM2, PhaseInc1, Gain1, URB1, UNP, PRB, ODVout2, PSVout2, Q2, I2, Q1, I1, ODVout1, PSVout1, DRFM1, CLK);

BIN2: OneBin port map (DRFM3, PhaseInc2, Gain2, URB2, UNP, PRB, ODVout3, PSVout3, Q3, I3, Q2, I2, ODVout2, PSVout2, DRFM2, CLK);

BIN3: OneBin port map (DRFM4, PhaseInc3, Gain3, URB3, UNP, PRB, ODVout4, PSVout4, Q4, I4, Q3, I3, ODVout3, PSVout3, DRFM3, CLK);

BIN4: OneBin port map (DRFM5, PhaseInc4, Gain4, URB4, UNP, PRB1, ODVout5, PSVout5, Q5, I5, Q4, I4, ODVout4, PSVout4, DRFM4, CLK);

BIN5: OneBin port map (DRFM6, PhaseInc5, Gain5, URB5, UNP, PRB1, ODVout6, PSVout6, Q6, I6, Q5, I5, ODVout5, PSVout5, DRFM5, CLK);

BIN6: OneBin port map (DRFM7, PhaseInc6, Gain6, URB6, UNP, PRB1, ODVout7, PSVout7, Q7, I7, Q6, I6, ODVout6, PSVout6, DRFM6, CLK);

BIN7: OneBin port map (DRFM8, PhaseInc7, Gain7, URB7, UNP, PRB1, ODVout8, PSVout8, Q8, I8, Q7, I7, ODVout7, PSVout7, DRFM7, CLK);

BIN8: OneBin port map (DRFM9, PhaseInc8, Gain8, URB8, UNP, PRB2, ODVout9, PSVout9, Q9, I9, Q8, I8, ODVout8, PSVout8, DRFM8, CLK);

BIN9: OneBin port map (DRFM10, PhaseInc9, Gain9, URB9, UNP, PRB2, ODVout10, PSVout10, Q10, I10, Q9, I9, ODVout9, PSVout9, DRFM9, CLK);

BIN10: OneBin port map (DRFM11, PhaseInc10, Gain10, URB10, UNP, PRB2, ODVout11, PSVout11, Q11, I11, Q10, I10, ODVout10, PSVout10, DRFM10, CLK);

BIN11: OneBin port map (DRFM12, PhaseInc11, Gain11, URB11, UNP, PRB2, ODVout12, PSVout12, Q12, I12, Q11, I11, ODVout11, PSVout11, DRFM11, CLK);

BIN12: OneBin port map (DRFM13, PhaseInc12, Gain12, URB12, UNP, PRB3, ODVout13, PSVout13, Q13, I13, Q12, I12, ODVout12, PSVout12, DRFM12, CLK);

BIN13: OneBin port map (DRFM14, PhaseInc13, Gain13, URB13, UNP, PRB3, ODVout14, PSVout14, Q14, I14, Q13, I13, ODVout13, PSVout13, DRFM13, CLK);

BIN14: OneBin port map (DRFM15, PhaseInc14, Gain14, URB14, UNP, PRB3, ODVout15, PSVout15, Q15, I15, Q14, I14, ODVout14, PSVout14, DRFM14, CLK);

BIN15: OneBin port map (DRFM16, PhaseInc15, Gain15, URB15, UNP, PRB3, ODVout16, PSVout16, Q16, I16, Q15, I15, ODVout15, PSVout15, DRFM15, CLK);

BIN16: OneBin port map (DRFM17, PhaseInc16, Gain16, URB16, UNP, PRB4, ODVout17, PSVout17, Q17, I17, Q16, I16, ODVout16, PSVout16, DRFM16, CLK);

BIN17: OneBin port map (DRFM18, PhaseInc17, Gain17, URB17, UNP, PRB4, ODVout18, PSVout18, Q18, I18, Q17, I17, ODVout17, PSVout17, DRFM17, CLK);

BIN18: OneBin port map (DRFM19, PhaseInc18, Gain18, URB18, UNP, PRB4, ODVout19, PSVout19, Q19, I19, Q18, I18, ODVout18, PSVout18, DRFM18, CLK);

BIN19: OneBin port map (DRFM20, PhaseInc19, Gain19, URB19, UNP, PRB4, ODVout20, PSVout20, Q20, I20, Q19, I19, ODVout19, PSVout19, DRFM19, CLK);

BIN20: OneBin port map (DRFM21, PhaseInc20, Gain20, URB20, UNP, PRB5, ODVout21, PSVout21, Q21, I21, Q20, I20, ODVout20, PSVout20, DRFM20, CLK);

BIN21: OneBin port map (DRFM22, PhaseInc21, Gain21, URB21, UNP, PRB5, ODVout22, PSVout22, Q22, I22, Q21, I21, ODVout21, PSVout21, DRFM21, CLK);

BIN22: OneBin port map (DRFM23, PhaseInc22, Gain22, URB22, UNP, PRB5, ODVout23, PSVout23, Q23, I23, Q22, I22, ODVout22, PSVout22, DRFM22, CLK);

BIN23: OneBin port map (DRFM24, PhaseInc23, Gain23, URB23, UNP, PRB5, ODVout24, PSVout24, Q24, I24, Q23, I23, ODVout23, PSVout23, DRFM23, CLK);

BIN24: OneBin port map (DRFM25, PhaseInc24, Gain24, URB24, UNP, PRB6, ODVout25, PSVout25, Q25, I25, Q24, I24, ODVout24, PSVout24, DRFM24, CLK);

BIN25: OneBin port map (DRFM26, PhaseInc25, Gain25, URB25, UNP, PRB6, ODVout26, PSVout26, Q26, I26, Q25, I25, ODVout25, PSVout25, DRFM25, CLK);

BIN26: OneBin port map (DRFM27, PhaseInc26, Gain26, URB26, UNP, PRB6, ODVout27, PSVout27, Q27, I27, Q26, I26, ODVout26, PSVout26, DRFM26, CLK);

BIN27: OneBin port map (DRFM28, PhaseInc27, Gain27, URB27, UNP, PRB6, ODVout28, PSVout28, Q28, I28, Q27, I27, ODVout27, PSVout27, DRFM27, CLK);

BIN28: OneBin port map (DRFM29, PhaseInc28, Gain28, URB28, UNP, PRB7, ODVout29, PSVout29, Q29, I29, Q28, I28, ODVout28, PSVout28, DRFM28, CLK);

BIN29: OneBin port map (DRFM30, PhaseInc29, Gain29, URB29, UNP, PRB7, ODVout30, PSVout30, Q30, I30, Q29, I29, ODVout29, PSVout29, DRFM29, CLK);

BIN30: OneBin port map (DRFM31, PhaseInc30, Gain30, URB30, UNP, PRB7, ODVout31, PSVout31, Q31, I31, Q30, I30, ODVout30, PSVout30, DRFM30, CLK);

BIN31: OneBin port map (DRFM32, PhaseInc31, Gain31, URB31, UNP, PRB7, ODVout32, PSVout32, Q32, I32, Q31, I31, ODVout31, PSVout31, DRFM31, CLK);

BIN32: OneBin port map (DRFM33, PhaseInc32, Gain32, URB32, UNP, PRB8, ODVout33, PSVout33, Q33, I33, Q32, I32, ODVout32, PSVout32, DRFM32, CLK);

BIN33: OneBin port map (DRFM34, PhaseInc33, Gain33, URB33, UNP, PRB8, ODVout34, PSVout34, Q34, I34, Q33, I33, ODVout33, PSVout33, DRFM33, CLK);

BIN34: OneBin port map (DRFM35, PhaseInc34, Gain34, URB34, UNP, PRB8, ODVout35, PSVout35, Q35, I35, Q34, I34, ODVout34, PSVout34, DRFM34, CLK);

BIN35: OneBin port map (DRFM36, PhaseInc35, Gain35, URB35, UNP, PRB8, ODVout36, PSVout36, Q36, I36, Q35, I35, ODVout35, PSVout35, DRFM35, CLK);

BIN36: OneBin port map (DRFM37, PhaseInc36, Gain36, URB36, UNP, PRB9, ODVout37, PSVout37, Q37, I37, Q36, I36, ODVout36, PSVout36, DRFM36, CLK);

BIN37: OneBin port map (DRFM38, PhaseInc37, Gain37, URB37, UNP, PRB9, ODVout38, PSVout38, Q38, I38, Q37, I37, ODVout37, PSVout37, DRFM37, CLK);

BIN38: OneBin port map (DRFM39, PhaseInc38, Gain38, URB38, UNP, PRB9, ODVout39, PSVout39, Q39, I39, Q38, I38, ODVout38, PSVout38, DRFM38, CLK);

BIN39: OneBin port map (DRFM40, PhaseInc39, Gain39, URB39, UNP, PRB9, ODVout40, PSVout40, Q40, I40, Q39, I39, ODVout39, PSVout39, DRFM39, CLK);

BIN40: OneBin port map (DRFM41, PhaseInc40, Gain40, URB40, UNP, PRB10, ODVout41, PSVout41, Q41, I41, Q40, I40, ODVout40, PSVout40, DRFM40, CLK);

BIN41: OneBin port map (DRFM42, PhaseInc41, Gain41, URB41, UNP, PRB10, ODVout42, PSVout42, Q42, I42, Q41, I41, ODVout41, PSVout41, DRFM41, CLK);

BIN42: OneBin port map (DRFM43, PhaseInc42, Gain42, URB42, UNP, PRB10, ODVout43, PSVout43, Q43, I43, Q42, I42, ODVout42, PSVout42, DRFM42, CLK);

BIN43: OneBin port map (DRFM44, PhaseInc43, Gain43, URB43, UNP, PRB10, ODVout44, PSVout44, Q44, I44, Q43, I43, ODVout43, PSVout43, DRFM43, CLK);

BIN44: OneBin port map (DRFM45, PhaseInc44, Gain44, URB44, UNP, PRB11, ODVout45, PSVout45, Q45, I45, Q44, I44, ODVout44, PSVout44, DRFM44, CLK);

BIN45: OneBin port map (DRFM46, PhaseInc45, Gain45, URB45, UNP, PRB11, ODVout46, PSVout46, Q46, I46, Q45, I45, ODVout45, PSVout45, DRFM45, CLK);

BIN46: OneBin port map (DRFM47, PhaseInc46, Gain46, URB46, UNP, PRB11, ODVout47, PSVout47, Q47, I47, Q46, I46, ODVout46, PSVout46, DRFM46, CLK);

BIN47: OneBin port map (DRFM48, PhaseInc47, Gain47, URB47, UNP, PRB11, ODVout48, PSVout48, Q48, I48, Q47, I47, ODVout47, PSVout47, DRFM47, CLK);

BIN48: OneBin port map (DRFM49, PhaseInc48, Gain48, URB48, UNP, PRB12, ODVout49, PSVout49, Q49, I49, Q48, I48, ODVout48, PSVout48, DRFM48, CLK);

BIN49: OneBin port map (DRFM50, PhaseInc49, Gain49, URB49, UNP, PRB12, ODVout50, PSVout50, Q50, I50, Q49, I49, ODVout49, PSVout49, DRFM49, CLK);

BIN50: OneBin port map (DRFM51, PhaseInc50, Gain50, URB50, UNP, PRB12, ODVout51, PSVout51, Q51, I51, Q50, I50, ODVout50, PSVout50, DRFM50, CLK);

BIN51: OneBin port map (DRFM52, PhaseInc51, Gain51, URB51, UNP, PRB12, ODVout52, PSVout52, Q52, I52, Q51, I51, ODVout51, PSVout51, DRFM51, CLK);

BIN52: OneBin port map (DRFM53, PhaseInc52, Gain52, URB52, UNP, PRB13, ODVout53, PSVout53, Q53, I53, Q52, I52, ODVout52, PSVout52, DRFM52, CLK);

BIN53: OneBin port map (DRFM54, PhaseInc53, Gain53, URB53, UNP, PRB13, ODVout54, PSVout54, Q54, I54, Q53, I53, ODVout53, PSVout53, DRFM53, CLK);

BIN54: OneBin port map (DRFM55, PhaseInc54, Gain54, URB54, UNP, PRB13, ODVout55, PSVout55, Q55, I55, Q54, I54, ODVout54, PSVout54, DRFM54, CLK);

BIN55: OneBin port map (DRFM56, PhaseInc55, Gain55, URB55, UNP, PRB13, ODVout56, PSVout56, Q56, I56, Q55, I55, ODVout55, PSVout55, DRFM55, CLK);

BIN56: OneBin port map (DRFM57, PhaseInc56, Gain56, URB56, UNP, PRB14, ODVout57, PSVout57, Q57, I57, Q56, I56, ODVout56, PSVout56, DRFM56, CLK);

BIN57: OneBin port map (DRFM58, PhaseInc57, Gain57, URB57, UNP, PRB14, ODVout58, PSVout58, Q58, I58, Q57, I57, ODVout57, PSVout57, DRFM57, CLK);

BIN58: OneBin port map (DRFM59, PhaseInc58, Gain58, URB58, UNP, PRB14, ODVout59, PSVout59, Q59, I59, Q58, I58, ODVout58, PSVout58, DRFM58, CLK);

BIN59: OneBin port map (DRFM60, PhaseInc59, Gain59, URB59, UNP, PRB14, ODVout60, PSVout60, Q60, I60, Q59, I59, ODVout59, PSVout59, DRFM59, CLK);

BIN60: OneBin port map (DRFM61, PhaseInc60, Gain60, URB60, UNP, PRB15, ODVout61, PSVout61, Q61, I61, Q60, I60, ODVout60, PSVout60, DRFM60, CLK);

BIN61: OneBin port map (DRFM62, PhaseInc61, Gain61, URB61, UNP, PRB15, ODVout62, PSVout62, Q62, I62, Q61, I61, ODVout61, PSVout61, DRFM61, CLK);

BIN62: OneBin port map (DRFM63, PhaseInc62, Gain62, URB62, UNP, PRB15, ODVout63, PSVout63, Q63, I63, Q62, I62, ODVout62, PSVout62, DRFM62, CLK);

BIN63: OneBin port map (DRFM64, PhaseInc63, Gain63, URB63, UNP, PRB15, ODVout64, PSVout64, Q64, I64, Q63, I63, ODVout63, PSVout63, DRFM63, CLK);

BIN64: OneBin port map (DRFM65, PhaseInc64, Gain64, URB64, UNP, PRB16, ODVout65, PSVout65, Q65, I65, Q64, I64, ODVout64, PSVout64, DRFM64, CLK);

BIN65: OneBin port map (DRFM66, PhaseInc65, Gain65, URB65, UNP, PRB16, ODVout66, PSVout66, Q66, I66, Q65, I65, ODVout65, PSVout65, DRFM65, CLK);

BIN66: OneBin port map (DRFM67, PhaseInc66, Gain66, URB66, UNP, PRB16, ODVout67, PSVout67, Q67, I67, Q66, I66, ODVout66, PSVout66, DRFM66, CLK);

BIN67: OneBin port map (DRFM68, PhaseInc67, Gain67, URB67, UNP, PRB16, ODVout68, PSVout68, Q68, I68, Q67, I67, ODVout67, PSVout67, DRFM67, CLK);

BIN68: OneBin port map (DRFM69, PhaseInc68, Gain68, URB68, UNP, PRB17, ODVout69, PSVout69, Q69, I69, Q68, I68, ODVout68, PSVout68, DRFM68, CLK);

BIN69: OneBin port map (DRFM70, PhaseInc69, Gain69, URB69, UNP, PRB17, ODVout70, PSVout70, Q70, I70, Q69, I69, ODVout69, PSVout69, DRFM69, CLK);

BIN70: OneBin port map (DRFM71, PhaseInc70, Gain70, URB70, UNP, PRB17, ODVout71, PSVout71, Q71, I71, Q70, I70, ODVout70, PSVout70, DRFM70, CLK);

BIN71: OneBin port map (DRFM72, PhaseInc71, Gain71, URB71, UNP, PRB17, ODVout72, PSVout72, Q72, I72, Q71, I71, ODVout71, PSVout71, DRFM71, CLK);

BIN72: OneBin port map (DRFM73, PhaseInc72, Gain72, URB72, UNP, PRB18, ODVout73, PSVout73, Q73, I73, Q72, I72, ODVout72, PSVout72, DRFM72, CLK);

BIN73: OneBin port map (DRFM74, PhaseInc73, Gain73, URB73, UNP, PRB18, ODVout74, PSVout74, Q74, I74, Q73, I73, ODVout73, PSVout73, DRFM73, CLK);

BIN74: OneBin port map (DRFM75, PhaseInc74, Gain74, URB74, UNP, PRB18, ODVout75, PSVout75, Q75, I75, Q74, I74, ODVout74, PSVout74, DRFM74, CLK);

BIN75: OneBin port map (DRFM76, PhaseInc75, Gain75, URB75, UNP, PRB18, ODVout76, PSVout76, Q76, I76, Q75, I75, ODVout75, PSVout75, DRFM75, CLK);

BIN76: OneBin port map (DRFM77, PhaseInc76, Gain76, URB76, UNP, PRB19, ODVout77, PSVout77, Q77, I77, Q76, I76, ODVout76, PSVout76, DRFM76, CLK);

BIN77: OneBin port map (DRFM78, PhaseInc77, Gain77, URB77, UNP, PRB19, ODVout78, PSVout78, Q78, I78, Q77, I77, ODVout77, PSVout77, DRFM77, CLK);

BIN78: OneBin port map (DRFM79, PhaseInc78, Gain78, URB78, UNP, PRB19, ODVout79, PSVout79, Q79, I79, Q78, I78, ODVout78, PSVout78, DRFM78, CLK);

BIN79: OneBin port map (DRFM80, PhaseInc79, Gain79, URB79, UNP, PRB19, ODVout80, PSVout80, Q80, I80, Q79, I79, ODVout79, PSVout79, DRFM79, CLK);

BIN80: OneBin port map (DRFM81, PhaseInc80, Gain80, URB80, UNP, PRB20, ODVout81, PSVout81, Q81, I81, Q80, I80, ODVout80, PSVout80, DRFM80, CLK);

BIN81: OneBin port map (DRFM82, PhaseInc81, Gain81, URB81, UNP, PRB20, ODVout82, PSVout82, Q82, I82, Q81, I81, ODVout81, PSVout81, DRFM81, CLK);

BIN82: OneBin port map (DRFM83, PhaseInc82, Gain82, URB82, UNP, PRB20, ODVout83, PSVout83, Q83, I83, Q82, I82, ODVout82, PSVout82, DRFM82, CLK);

BIN83: OneBin port map (DRFM84, PhaseInc83, Gain83, URB83, UNP, PRB20, ODVout84, PSVout84, Q84, I84, Q83, I83, ODVout83, PSVout83, DRFM83, CLK);

BIN84: OneBin port map (DRFM85, PhaseInc84, Gain84, URB84, UNP, PRB21, ODVout85, PSVout85, Q85, I85, Q84, I84, ODVout84, PSVout84, DRFM84, CLK);

BIN85: OneBin port map (DRFM86, PhaseInc85, Gain85, URB85, UNP, PRB21, ODVout86, PSVout86, Q86, I86, Q85, I85, ODVout85, PSVout85, DRFM85, CLK);

BIN86: OneBin port map (DRFM87, PhaseInc86, Gain86, URB86, UNP, PRB21, ODVout87, PSVout87, Q87, I87, Q86, I86, ODVout86, PSVout86, DRFM86, CLK);

BIN87: OneBin port map (DRFM88, PhaseInc87, Gain87, URB87, UNP, PRB21, ODVout88, PSVout88, Q88, I88, Q87, I87, ODVout87, PSVout87, DRFM87, CLK);

BIN88: OneBin port map (DRFM89, PhaseInc88, Gain88, URB88, UNP, PRB22, ODVout89, PSVout89, Q89, I89, Q88, I88, ODVout88, PSVout88, DRFM88, CLK);

BIN89: OneBin port map (DRFM90, PhaseInc89, Gain89, URB89, UNP, PRB22, ODVout90, PSVout90, Q90, I90, Q89, I89, ODVout89, PSVout89, DRFM89, CLK);

BIN90: OneBin port map (DRFM91, PhaseInc90, Gain90, URB90, UNP, PRB22, ODVout91, PSVout91, Q91, I91, Q90, I90, ODVout90, PSVout90, DRFM90, CLK);

BIN91: OneBin port map (DRFM92, PhaseInc91, Gain91, URB91, UNP, PRB22, ODVout92, PSVout92, Q92, I92, Q91, I91, ODVout91, PSVout91, DRFM91, CLK);

BIN92: OneBin port map (DRFM93, PhaseInc92, Gain92, URB92, UNP, PRB23, ODVout93, PSVout93, Q93, I93, Q92, I92, ODVout92, PSVout92, DRFM92, CLK);

BIN93: OneBin port map (DRFM94, PhaseInc93, Gain93, URB93, UNP, PRB23, ODVout94, PSVout94, Q94, I94, Q93, I93, ODVout93, PSVout93, DRFM93, CLK);

BIN94: OneBin port map (DRFM95, PhaseInc94, Gain94, URB94, UNP, PRB23, ODVout95, PSVout95, Q95, I95, Q94, I94, ODVout94, PSVout94, DRFM94, CLK);

BIN95: OneBin port map (DRFM96, PhaseInc95, Gain95, URB95, UNP, PRB23, ODVout96, PSVout96, Q96, I96, Q95, I95, ODVout95, PSVout95, DRFM95, CLK);

BIN96: OneBin port map (DRFM97, PhaseInc96, Gain96, URB96, UNP, PRB24, ODVout97, PSVout97, Q97, I97, Q96, I96, ODVout96, PSVout96, DRFM96, CLK);

BIN97: OneBin port map (DRFM98, PhaseInc97, Gain97, URB97, UNP, PRB24, ODVout98, PSVout98, Q98, I98, Q97, I97, ODVout97, PSVout97, DRFM97, CLK);

BIN98: OneBin port map (DRFM99, PhaseInc98, Gain98, URB98, UNP, PRB24, ODVout99, PSVout99, Q99, I99, Q98, I98, ODVout98, PSVout98, DRFM98, CLK);

BIN99: OneBin port map (DRFM100, PhaseInc99, Gain99, URB99, UNP, PRB24, ODVout100, PSVout100, Q100, I100, Q99, I99, ODVout99, PSVout99, DRFM99, CLK);

BIN100: OneBin port map (DRFM101, PhaseInc100, Gain100, URB100, UNP, PRB25, ODVout101, PSVout101, Q101, I101, Q100, I100, ODVout100, PSVout100, DRFM100, CLK);

BIN101: OneBin port map (DRFM102, PhaseInc101, Gain101, URB101, UNP, PRB25, ODVout102, PSVout102, Q102, I102, Q101, I101, ODVout101, PSVout101, DRFM101, CLK);

BIN102: OneBin port map (DRFM103, PhaseInc102, Gain102, URB102, UNP, PRB25, ODVout103, PSVout103, Q103, I103, Q102, I102, ODVout102, PSVout102, DRFM102, CLK);

BIN103: OneBin port map (DRFM104, PhaseInc103, Gain103, URB103, UNP, PRB25, ODVout104, PSVout104, Q104, I104, Q103, I103, ODVout103, PSVout103, DRFM103, CLK);

BIN104: OneBin port map (DRFM105, PhaseInc104, Gain104, URB104, UNP, PRB26, ODVout105, PSVout105, Q105, I105, Q104, I104, ODVout104, PSVout104, DRFM104, CLK);

BIN105: OneBin port map (DRFM106, PhaseInc105, Gain105, URB105, UNP, PRB26, ODVout106, PSVout106, Q106, I106, Q105, I105, ODVout105, PSVout105, DRFM105, CLK);

BIN106: OneBin port map (DRFM107, PhaseInc106, Gain106, URB106, UNP, PRB26, ODVout107, PSVout107, Q107, I107, Q106, I106, ODVout106, PSVout106, DRFM106, CLK);

BIN107: OneBin port map (DRFM108, PhaseInc107, Gain107, URB107, UNP, PRB26, ODVout108, PSVout108, Q108, I108, Q107, I107, ODVout107, PSVout107, DRFM107, CLK);

BIN108: OneBin port map (DRFM109, PhaseInc108, Gain108, URB108, UNP, PRB27, ODVout109, PSVout109, Q109, I109, Q108, I108, ODVout108, PSVout108, DRFM108, CLK);

BIN109: OneBin port map (DRFM110, PhaseInc109, Gain109, URB109, UNP, PRB27, ODVout110, PSVout110, Q110, I110, Q109, I109, ODVout109, PSVout109, DRFM109, CLK);

BIN110: OneBin port map (DRFM111, PhaseInc110, Gain110, URB110, UNP, PRB27, ODVout111, PSVout111, Q111, I111, Q110, I110, ODVout110, PSVout110, DRFM110, CLK);

BIN111: OneBin port map (DRFM112, PhaseInc111, Gain111, URB111, UNP, PRB27, ODVout112, PSVout112, Q112, I112, Q111, I111, ODVout111, PSVout111, DRFM111, CLK);

BIN112: OneBin port map (DRFM113, PhaseInc112, Gain112, URB112, UNP, PRB28, ODVout113, PSVout113, Q113, I113, Q112, I112, ODVout112, PSVout112, DRFM112, CLK);

BIN113: OneBin port map (DRFM114, PhaseInc113, Gain113, URB113, UNP, PRB28, ODVout114, PSVout114, Q114, I114, Q113, I113, ODVout113, PSVout113, DRFM113, CLK);

BIN114: OneBin port map (DRFM115, PhaseInc114, Gain114, URB114, UNP, PRB28, ODVout115, PSVout115, Q115, I115, Q114, I114, ODVout114, PSVout114, DRFM114, CLK);

BIN115: OneBin port map (DRFM116, PhaseInc115, Gain115, URB115, UNP, PRB28, ODVout116, PSVout116, Q116, I116, Q115, I115, ODVout115, PSVout115, DRFM115, CLK);

BIN116: OneBin port map (DRFM117, PhaseInc116, Gain116, URB116, UNP, PRB29, ODVout117, PSVout117, Q117, I117, Q116, I116, ODVout116, PSVout116, DRFM116, CLK);

BIN117: OneBin port map (DRFM118, PhaseInc117, Gain117, URB117, UNP, PRB29, ODVout118, PSVout118, Q118, I118, Q117, I117, ODVout117, PSVout117, DRFM117, CLK);

BIN118: OneBin port map (DRFM119, PhaseInc118, Gain118, URB118, UNP, PRB29, ODVout119, PSVout119, Q119, I119, Q118, I118, ODVout118, PSVout118, DRFM118, CLK);

BIN119: OneBin port map (DRFM120, PhaseInc119, Gain119, URB119, UNP, PRB29, ODVout120, PSVout120, Q120, I120, Q119, I119, ODVout119, PSVout119, DRFM119, CLK);

BIN120: OneBin port map (DRFM121, PhaseInc120, Gain120, URB120, UNP, PRB30, ODVout121, PSVout121, Q121, I121, Q120, I120, ODVout120, PSVout120, DRFM120, CLK);

BIN121: OneBin port map (DRFM122, PhaseInc121, Gain121, URB121, UNP, PRB30, ODVout122, PSVout122, Q122, I122, Q121, I121, ODVout121, PSVout121, DRFM121, CLK);

BIN122: OneBin port map (DRFM123, PhaseInc122, Gain122, URB122, UNP, PRB30, ODVout123, PSVout123, Q123, I123, Q122, I122, ODVout122, PSVout122, DRFM122, CLK);

BIN123: OneBin port map (DRFM124, PhaseInc123, Gain123, URB123, UNP, PRB30, ODVout124, PSVout124, Q124, I124, Q123, I123, ODVout123, PSVout123, DRFM123, CLK);

BIN124: OneBin port map (DRFM125, PhaseInc124, Gain124, URB124, UNP, PRB31, ODVout125, PSVout125, Q125, I125, Q124, I124, ODVout124, PSVout124, DRFM124, CLK);

BIN125: OneBin port map (DRFM126, PhaseInc125, Gain125, URB125, UNP, PRB31, ODVout126, PSVout126, Q126, I126, Q125, I125, ODVout125, PSVout125, DRFM125, CLK);

BIN126: OneBin port map (DRFM127, PhaseInc126, Gain126, URB126, UNP, PRB31, ODVout127, PSVout127, Q127, I127, Q126, I126, ODVout126, PSVout126, DRFM126, CLK);

BIN127: OneBin port map (PhaseSamp, PhaseInc127, Gain127, URB127, UNP, PRB31, ODVin, PSVin, "00000000000000000", "00000000000000000", Q127, I127,ODVout127, PSVout127, DRFM127, CLK);

-- Output Format:

-- 63-41 |   40   |   39   | 38-22 | 21-5 | 4-0

--unused | PSVout | ODVout |   Q   |   I  | DRFM

 

Output(40)<=PSVout0;

Output(39)<=ODVout0;

Output(38 downto 22)<=Q;

Output(21 downto 5)<=I;

Output(4 downto 0)<=DRFM0;

Output(63 downto 41)<="00000000000000000000000";

 

end One28Bin;

 

appendix c

This appendix contains the support files required to compile and execute the VHDL macros on the SRC-6E.

A.   4 Bin .box file

module FourBin (Input, Output, CLK) /* synthesis syn_black_box */ ;

      input [63:0] Input;

      output [63:0] Output;

      input CLK;

endmodule

 

B.   4 Bin .info file

BEGIN_DEF "Four_Bin"

      MACRO = "FourBin";

      STATEFUL = NO;

      EXTERNAL = NO;

      PIPELINED = YES;

      LATENCY = 21;

     

      INPUTS = 1:

      I0 = INT 64 BITS (Input[63:0])

      ;

 

      OUTPUTS = 1:

      O0 = INT 64 BITS (Output[63:0])

      ;

 

      IN_SIGNAL : 1 BITS "CLK"="CLOCK";

 

END_DEF

 

C.   4 Bin .mc file

/* FourBinS.mc */

#include <libmap.h>

 

#define IBANK MAX_OBM_SIZE

 

void FourBinS ( int n, long long a[], long long b[], int mapno)

 

 {

      struct {

            long long al[IBANK];

      } banka;

      struct {

            long long bl[IBANK];

        } bankb;

 

      long long *al     = banka.al;

      long long *bl     = bankb.bl;

 

 

      int i, nbytes;

      /* nbytes = n*8;*/

      nbytes = (((n+3)/4)*4)*8;

 

      cm2obm_a(al, a, nbytes);

      wait_server_a();

 

      for (i = 0; i < n; i++) {

            Four_Bin(al[i], &bl[i]);

        }

 

      obm2cm_b (b, bl, nbytes);

      wait_server_b();

    }

 

D.   4 Bin .c file

/* main.c */

#include <stdio.h>

#include <sys/types.h>

#include <libmap.h>

 

#define SAMPLE_MAX 500000     /* Maximum number of phase samples. */

#define PADDING 17 /* number of padding sets before and after the samples */

void FourBinS();

void *Cache_Aligned_Allocate();

void Cache_Aligned_Free();

 

int main () {

      int i, nmap, mapnum, numofsamps, nbytes;

      short phzsampdat[SAMPLE_MAX], dummysample;

      FILE *fileptr;

      long I0, Q0, OtherBinDataSIN, OtherBinDataCOS;

      char phzincdat[16], ampscaldat[16], URB[16];

      char PRB, UNP, PSVin, ODVin, ODVout0, PSVout0, DRFM0, binnumber;

      long long temp, binprogram;

      long long* dataa;

      long long* datab;

 

/* Timing variables. */

      double tstart, tend, tcume, ttotal;

      extern double second();

 

/* initialization */

      tstart = second();

      mapnum = 0;

      nmap = 1;

      numofsamps=0;

      dummysample=0;

 

/* Read in phase increment values. */

      if ((fileptr = fopen("datafiles/phzinc.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &phzincdat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in amplitude scaling values */

      if ((fileptr = fopen("datafiles/ampscal.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &ampscaldat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in pulse phase samples */

      if ((fileptr = fopen("datafiles/phzsamp.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

      numofsamps = 0;

      while (fscanf(fileptr, "%x", &phzsampdat[numofsamps]) != EOF)

      {

            numofsamps++;

      }

      fclose(fileptr);

     

    tend = second();

    tcume = tend - tstart;

    ttotal = tcume;

    printf ("\n Number of input samples: %d", numofsamps);

    printf ("\n Time for disk access of input data:  %19.10f", tcume);

 

      tstart = second();

      nbytes = (((numofsamps+PADDING*2+4)/4)*4)*8;

      dataa=Cache_Aligned_Allocate(nbytes);

      datab=Cache_Aligned_Allocate(nbytes);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to allocate the data caches for the MAP:  %19.10f", tcume);

 

    tstart = second();

/* pack the data as follows:

Input: formats, cycle begins when PRB=1, 1 format per clock

 ten bits of each bin: 10 |  9-5   |4-1 |

                       URB|PhaseInc|Gain|

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

 63-8                              | 7-3   | 2    | 1  | 0

unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 2 if PSVin and UNP are taken high

*/

 

      for (i=0; i<16; i++){

            URB[i]=1;}/*set all bins to be used*/

      for (i=0; i<PADDING; i++){/*pad the control signals before and after*/

            dataa[i]=0; /*set PSVin, UNP, and PRB = 000 */

            dataa[i+numofsamps+PADDING+1]=0; /*set PSVin, UNP, and PRB = 000 */

            }

 

            PSVin=0;

            UNP=0;

            PRB=1; /* start the program sequence*/

            temp=((long long) URB[3] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[3] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[3] & 0xFLL);

            temp=temp<<1 | ((long long) URB[2] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[2] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[2] & 0xFLL);

            temp=temp<<1 | ((long long) URB[1] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[1] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[1] & 0xFLL);

            temp=temp<<1 | ((long long) URB[0] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[0] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[0] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[PADDING]=temp;

 

            PRB=0;

            PSVin=1; /* start sample input */

            UNP=1; /* use new programming */

            temp=((long long) phzsampdat[0] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[1+PADDING]=temp;

 

            UNP=0;

 

      for (i = 1; i < numofsamps; i++) {

            temp=((long long) phzsampdat[i] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[i+PADDING+1]=temp;}

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to pack the data for transfer to MAP:  %19.10f", tcume);

 

    tstart = second();

/* allocate map to this problem */

      if (map_allocate (nmap)) {

            fprintf (stdout, "Map allocation failed.\n");

      exit (1);

      }

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP allocation:  %19.10f", tcume);

 

    tstart = second();

/* call compute */

      FourBinS (numofsamps+PADDING*2+1, dataa, datab, mapnum);

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP call:  %19.10f", tcume);

 

    tstart = second();

/* Open output file for writing. */

      if ((fileptr = fopen("datafiles/IandQout.txt", "w")) == NULL)

                  fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

 

/* put headers in output file */

      fprintf(fileptr, "Iout  Qout  ODVout PSVout DRFM\n");

      fprintf(fileptr, "----- ----- ------ ------ -----\n");

 

/* unpack the results and send to output*/

      for (i = 0; i < numofsamps+PADDING*2+1; i++) {

            DRFM0=datab[i] & 0x1FLL;

            I0=datab[i]>>5 & 0x1FFFFLL;

            Q0=datab[i]>>22 & 0x1FFFFLL;

            ODVout0=datab[i]>>39 & 0x1LL;

            PSVout0=datab[i]>>40 & 0x1LL;

            fprintf(fileptr, "%05X %05X   %01X      %01X    %02X\n", I0, Q0, ODVout0, PSVout0, DRFM0);

      }

   fclose (fileptr);

 

   tend = second();

   tcume = tend - tstart;

   ttotal = ttotal + tcume;

   printf ("\n Time to unpack results and send to output file:  %19.10f", tcume);

 

   tstart = second();

/* free the map */

      if (map_free (nmap)) {

             printf ("Map deallocation failed. \n");

        exit (1);

        }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the MAP:  %19.10f", tcume);

 

      tstart = second();

 

      Cache_Aligned_Free((char *)dataa);

      Cache_Aligned_Free((char *)datab);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the data arrays:  %19.10f", tcume);

    printf ("\n Total Time: %19.10f\n\n", ttotal);

}

 

E.   8 Bin .box file

module EightBin (Input, Output, CLK) /* synthesis syn_black_box */ ;

      input [63:0] Input;

      output [63:0] Output;

      input CLK;

endmodule

 

F.   8 Bin .info file

BEGIN_DEF "Eight_Bin"

      MACRO = "EightBin";

      STATEFUL = NO;

      EXTERNAL = NO;

      PIPELINED = YES;

      LATENCY = 21;

     

      INPUTS = 1:

      I0 = INT 64 BITS (Input[63:0])

      ;

 

      OUTPUTS = 1:

      O0 = INT 64 BITS (Output[63:0])

      ;

 

      IN_SIGNAL : 1 BITS "CLK"="CLOCK";

END_DEF

 

G.   8 Bin .mc file

/* EightBinS.mc */

#include <libmap.h>

 

#define IBANK MAX_OBM_SIZE

 

void EightBinS ( int n, long long a[], long long b[], int mapno)

 

 {

      struct {

            long long al[IBANK];

      } banka;

      struct {

            long long bl[IBANK];

        } bankb;

 

      long long *al     = banka.al;

      long long *bl     = bankb.bl;

 

 

      int i, nbytes;

      /* nbytes = n*8;*/

      nbytes = (((n+3)/4)*4)*8;

 

      cm2obm_a(al, a, nbytes);

      wait_server_a();

 

      for (i = 0; i < n; i++) {

            Eight_Bin(al[i], &bl[i]);

        }

 

      obm2cm_b (b, bl, nbytes);

      wait_server_b();

    }

 

H.   8 Bin .c file

/* main.c */

 

#include <stdio.h>

#include <sys/types.h>

#include <libmap.h>

 

#define SAMPLE_MAX 500000     /* Maximum number of phase samples. */

#define PADDING 17 /* number of padding sets before and after the samples */

void EightBinS();

void *Cache_Aligned_Allocate();

void Cache_Aligned_Free();

 

int main () {

 

      int i, nmap, mapnum, numofsamps, nbytes;

      short phzsampdat[SAMPLE_MAX],dummysample;

      FILE *fileptr;

      long I0, Q0, OtherBinDataSIN, OtherBinDataCOS;

      char phzincdat[16], ampscaldat[16], URB[16];

      char PRB, UNP, PSVin, ODVin, ODVout0, PSVout0, DRFM0, binnumber;

      long long temp, binprogram;

      long long* dataa;

      long long* datab;

 

/* Timing variables. */

      double tstart, tend, tcume, ttotal;

      extern double second();

 

/* initialization */

      tstart = second();

      mapnum = 0;

      nmap = 1;

      numofsamps=0;

      dummysample=0;

 

/* Read in phase increment values. */

      if ((fileptr = fopen("datafiles/phzinc.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &phzincdat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in amplitude scaling values */

      if ((fileptr = fopen("datafiles/ampscal.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &ampscaldat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in pulse phase samples */

      if ((fileptr = fopen("datafiles/phzsamp.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

      numofsamps = 0;

      while (fscanf(fileptr, "%x", &phzsampdat[numofsamps]) != EOF)

      {

            numofsamps++;

      }

      fclose(fileptr);

     

    tend = second();

    tcume = tend - tstart;

    ttotal = tcume;

    printf ("\n Number of input samples: %d", numofsamps);

    printf ("\n Time for disk access of input data:  %19.10f", tcume);

 

      tstart = second();

      nbytes = (((numofsamps+PADDING*2+2)/4)*4)*8;

      dataa=Cache_Aligned_Allocate(nbytes);

      datab=Cache_Aligned_Allocate(nbytes);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to allocate the data caches for the MAP:  %19.10f", tcume);

 

    tstart = second();

/* pack the data as follows:

Input: formats, cycle begins when PRB=1, 1 format per clock

 ten bits of each bin: 10 |  9-5   |4-1 |

                       URB|PhaseInc|Gain|

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

 63-8                              | 7-3   | 2    | 1  | 0

unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 3 if PSVin and UNP are taken high

*/

 

      for (i=0; i<16; i++){

            URB[i]=1;}/*set all bins to be used*/

      for (i=0; i<PADDING; i++){/*pad the control signals before and after*/

            dataa[i]=0; /*set PSVin, UNP, and PRB = 000 */

            dataa[i+numofsamps+PADDING+2]=0; /*set PSVin, UNP, and PRB = 000 */

            }

 

            PSVin=0;

            UNP=0;

            PRB=1; /* start the program sequence*/

            temp=((long long) URB[3] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[3] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[3] & 0xFLL);

            temp=temp<<1 | ((long long) URB[2] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[2] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[2] & 0xFLL);

            temp=temp<<1 | ((long long) URB[1] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[1] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[1] & 0xFLL);

            temp=temp<<1 | ((long long) URB[0] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[0] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[0] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[PADDING]=temp;

 

            PRB=0;

            temp=((long long) URB[7] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[7] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[7] & 0xFLL);

            temp=temp<<1 | ((long long) URB[6] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[6] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[6] & 0xFLL);

            temp=temp<<1 | ((long long) URB[5] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[5] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[5] & 0xFLL);

            temp=temp<<1 | ((long long) URB[4] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[4] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[4] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[1+PADDING]=temp;

 

            PSVin=1; /* start sample input */

            UNP=1; /* use new programming */

            temp=((long long) phzsampdat[0] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[2+PADDING]=temp;

 

            UNP=0;

 

      for (i = 1; i < numofsamps; i++) {

            temp=((long long) phzsampdat[i] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[i+PADDING+2]=temp;}

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to pack the data for transfer to MAP:  %19.10f", tcume);

 

    tstart = second();

/* allocate map to this problem */

      if (map_allocate (nmap)) {

            fprintf (stdout, "Map allocation failed.\n");

      exit (1);

      }

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP allocation:  %19.10f", tcume);

 

    tstart = second();

/* call compute */

      EightBinS (numofsamps+PADDING*2+2, dataa, datab, mapnum);

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP call:  %19.10f", tcume);

 

    tstart = second();

/* Open output file for writing. */

      if ((fileptr = fopen("datafiles/IandQout.txt", "w")) == NULL)

                  fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

 

/* put headers in output file */

      fprintf(fileptr, "Iout  Qout  ODVout PSVout DRFM\n");

      fprintf(fileptr, "----- ----- ------ ------ -----\n");

 

/* unpack the results and send to output*/

      for (i = 0; i < numofsamps+PADDING*2+2; i++) {

            DRFM0=datab[i] & 0x1FLL;

            I0=datab[i]>>5 & 0x1FFFFLL;

            Q0=datab[i]>>22 & 0x1FFFFLL;

            ODVout0=datab[i]>>39 & 0x1LL;

            PSVout0=datab[i]>>40 & 0x1LL;

            fprintf(fileptr, "%05X %05X   %01X      %01X    %02X\n", I0, Q0, ODVout0, PSVout0, DRFM0);

      }

   fclose (fileptr);

 

   tend = second();

   tcume = tend - tstart;

   ttotal = ttotal + tcume;

   printf ("\n Time to unpack results and send to output file:  %19.10f", tcume);

 

   tstart = second();

/* free the map */

      if (map_free (nmap)) {

             printf ("Map deallocation failed. \n");

        exit (1);

        }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the MAP:  %19.10f", tcume);

 

      tstart = second();

 

      Cache_Aligned_Free((char *)dataa);

      Cache_Aligned_Free((char *)datab);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the data arrays:  %19.10f", tcume);

    printf ("\n Total Time: %19.10f\n\n", ttotal);

 

}

 

I.   16 Bin .box file

module SixteenBin (Input, Output, CLK) /* synthesis syn_black_box */ ;

      input [63:0] Input;

      output [63:0] Output;

      input CLK;

endmodule

 

j.   16 Bin .info file

BEGIN_DEF "Sixteen_Bin"

      MACRO = "SixteenBin";

      STATEFUL = NO;

      EXTERNAL = NO;

      PIPELINED = YES;

      LATENCY = 21;

     

      INPUTS = 1:

      I0 = INT 64 BITS (Input[63:0])

      ;

 

      OUTPUTS = 1:

      O0 = INT 64 BITS (Output[63:0])

      ;

 

      IN_SIGNAL : 1 BITS "CLK"="CLOCK";

END_DEF

 

k.   16 Bin .mc file

/* SixteenBinS.mc */

#include <libmap.h>

 

#define IBANK MAX_OBM_SIZE

 

void SixteenBinS ( int n, long long a[], long long b[], int mapno)

 

 {

      struct {

            long long al[IBANK];

      } banka;

      struct {

            long long bl[IBANK];

        } bankb;

 

      long long *al     = banka.al;

      long long *bl     = bankb.bl;

 

 

      int i, nbytes;

      /* nbytes = n*8;*/

      nbytes = (((n+3)/4)*4)*8;

 

      cm2obm_a(al, a, nbytes);

      wait_server_a();

 

      for (i = 0; i < n; i++) {

            Sixteen_Bin(al[i], &bl[i]);

        }

 

      obm2cm_b (b, bl, nbytes);

      wait_server_b();

    }

 

l.   16 Bin .c file

/* main.c */

 

#include <stdio.h>

#include <sys/types.h>

#include <libmap.h>

 

#define SAMPLE_MAX 500000     /* Maximum number of phase samples. */

#define PADDING 17 /* number of padding sets before and after the samples */

void SixteenBinS();

void *Cache_Aligned_Allocate();

void Cache_Aligned_Free();

 

int main () {

 

      int i, nmap, mapnum, numofsamps, nbytes;

      short phzsampdat[SAMPLE_MAX], dummysample;

      FILE *fileptr;

      long I0, Q0, OtherBinDataSIN, OtherBinDataCOS;

      char phzincdat[16], ampscaldat[16], URB[16];

      char UNP, PRB, PSVin, ODVin, ODVout0, PSVout0, DRFM0, binnumber;

      long long temp, binprogram;

      long long* dataa;

      long long* datab;

 

/* Timing variables. */

      double tstart, tend, tcume, ttotal;

      extern double second();

 

/* initialization */

      tstart = second();

      mapnum = 0;

      nmap = 1;

      numofsamps=0;

      dummysample=0;

 

/* Read in phase increment values. */

      if ((fileptr = fopen("datafiles/phzinc.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &phzincdat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in amplitude scaling values */

      if ((fileptr = fopen("datafiles/ampscal.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &ampscaldat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in pulse phase samples */

      if ((fileptr = fopen("datafiles/phzsamp.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

      numofsamps = 0;

      while (fscanf(fileptr, "%x", &phzsampdat[numofsamps]) != EOF)

      {

            numofsamps++;

      }

      fclose(fileptr);

     

    tend = second();

    tcume = tend - tstart;

    ttotal = tcume;

    printf ("\n Number of input samples: %d", numofsamps);

    printf ("\n Time for disk access of input data:  %19.10f", tcume);

 

      tstart = second();

      nbytes = (((numofsamps+PADDING*2+4)/4)*4)*8;

      dataa=Cache_Aligned_Allocate(nbytes);

      datab=Cache_Aligned_Allocate(nbytes);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to allocate the data caches for the MAP:  %19.10f", tcume);

 

    tstart = second();

/* pack the data as follows:

Input: formats, cycle begins when PRB=1, 1 format per clock

 ten bits of each bin: 10 |  9-5   |4-1 |

                       URB|PhaseInc|Gain|

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

 63-8                              | 7-3   | 2    | 1  | 0

unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 5 if PSVin and UNP are taken high

*/

 

      for (i=0; i<16; i++){

            URB[i]=1;}/*set all bins to be used*/

      for (i=0; i<PADDING; i++){/*pad the control signals before and after*/

            dataa[i]=0; /*set PSVin, UNP, and PRB = 000 */

            dataa[i+numofsamps+PADDING+4]=0; /*set PSVin, UNP, and PRB = 000 */

            }

 

            PSVin=0;

            UNP=0;

            PRB=1; /* start the program sequence*/

            temp=((long long) URB[3] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[3] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[3] & 0xFLL);

            temp=temp<<1 | ((long long) URB[2] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[2] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[2] & 0xFLL);

            temp=temp<<1 | ((long long) URB[1] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[1] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[1] & 0xFLL);

            temp=temp<<1 | ((long long) URB[0] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[0] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[0] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[PADDING]=temp;

 

            PRB=0;

            temp=((long long) URB[7] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[7] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[7] & 0xFLL);

            temp=temp<<1 | ((long long) URB[6] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[6] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[6] & 0xFLL);

            temp=temp<<1 | ((long long) URB[5] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[5] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[5] & 0xFLL);

            temp=temp<<1 | ((long long) URB[4] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[4] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[4] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[1+PADDING]=temp;

 

            temp=((long long) URB[11] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[11] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[11] & 0xFLL);

            temp=temp<<1 | ((long long) URB[10] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[10] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[10] & 0xFLL);

            temp=temp<<1 | ((long long) URB[9] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[9] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[9] & 0xFLL);

            temp=temp<<1 | ((long long) URB[8] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[8] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[8] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[2+PADDING]=temp;

 

            temp=((long long) URB[15] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[15] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[15] & 0xFLL);

            temp=temp<<1 | ((long long) URB[14] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[14] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[14] & 0xFLL);

            temp=temp<<1 | ((long long) URB[13] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[13] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[13] & 0xFLL);

            temp=temp<<1 | ((long long) URB[12] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[12] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[12] & 0xFLL);

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[3+PADDING]=temp;

 

            PSVin=1; /* start sample input */

            UNP=1; /* use new programming */

            temp=((long long) phzsampdat[0] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[4+PADDING]=temp;

 

            UNP=0;

      for (i = 1; i < numofsamps; i++) {

            temp=((long long) phzsampdat[i] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[i+PADDING+4]=temp;}

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to pack the data for transfer to MAP:  %19.10f", tcume);

 

    tstart = second();

/* allocate map to this problem */

      if (map_allocate (nmap)) {

            fprintf (stdout, "Map allocation failed.\n");

      exit (1);

      }

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP allocation:  %19.10f", tcume);

 

    tstart = second();

/* call compute */

      SixteenBinS (numofsamps+PADDING*2+4, dataa, datab, mapnum);

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP call:  %19.10f", tcume);

 

    tstart = second();

/* Open output file for writing. */

      if ((fileptr = fopen("datafiles/IandQout.txt", "w")) == NULL)

                  fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

 

/* put headers in output file */

      fprintf(fileptr, "Iout  Qout  ODVout PSVout DRFM\n");

      fprintf(fileptr, "----- ----- ------ ------ -----\n");

 

/* unpack the results and send to output*/

      for (i = 0; i < numofsamps+PADDING*2+4; i++) {

            DRFM0=datab[i] & 0x1FLL;

            I0=datab[i]>>5 & 0x1FFFFLL;

            Q0=datab[i]>>22 & 0x1FFFFLL;

            ODVout0=datab[i]>>39 & 0x1LL;

            PSVout0=datab[i]>>40 & 0x1LL;

            fprintf(fileptr, "%05X %05X   %01X      %01X    %02X\n", I0, Q0, ODVout0, PSVout0, DRFM0);

      }

   fclose (fileptr);

 

   tend = second();

   tcume = tend - tstart;

   ttotal = ttotal + tcume;

   printf ("\n Time to unpack results and send to output file:  %19.10f", tcume);

 

   tstart = second();

/* free the map */

      if (map_free (nmap)) {

             printf ("Map deallocation failed. \n");

        exit (1);

        }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the MAP:  %19.10f", tcume);

 

      tstart = second();

 

      Cache_Aligned_Free((char *)dataa);

      Cache_Aligned_Free((char *)datab);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the data arrays:  %19.10f", tcume);

    printf ("\n Total Time: %19.10f\n\n", ttotal);

 

}

 

M.   64 Bin .box file

module SixtyFourBin (Input, Output, CLK) /* synthesis syn_black_box */ ;

      input [63:0] Input;

      output [63:0] Output;

      input CLK;

endmodule

 

n.   64 Bin .info file

BEGIN_DEF "SixtyFour_Bin"

      MACRO = "SixtyFourBin";

      STATEFUL = NO;

      EXTERNAL = NO;

      PIPELINED = YES;

      LATENCY = 133;

     

      INPUTS = 1:

      I0 = INT 64 BITS (Input[63:0])

      ;

 

      OUTPUTS = 1:

      O0 = INT 64 BITS (Output[63:0])

      ;

 

      IN_SIGNAL : 1 BITS "CLK"="CLOCK";

 

END_DEF

 

o.   64 Bin .mc file

/* SixtyFourBinS.mc */

#include <libmap.h>

 

#define IBANK MAX_OBM_SIZE

 

void SixtyFourBinS ( int n, long long a[], long long b[], int mapno)

 

 {

      struct {

            long long al[IBANK];

      } banka;

      struct {

            long long bl[IBANK];

        } bankb;

 

      long long *al     = banka.al;

      long long *bl     = bankb.bl;

 

 

      int i, nbytes;

      /* nbytes = n*8;*/

      nbytes = (((n+3)/4)*4)*8;

 

      cm2obm_a(al, a, nbytes);

      wait_server_a();

 

      for (i = 0; i < n; i++) {

            SixtyFour_Bin(al[i], &bl[i]);

        }

 

      obm2cm_b (b, bl, nbytes);

      wait_server_b();

    }

 

p.   64 Bin .c file

/* main.c */

 

#include <stdio.h>

#include <sys/types.h>

#include <libmap.h>

 

#define SAMPLE_MAX 500000     /* Maximum number of phase samples. */

#define PADDING 64 /* number of padding sets before and after the samples */

void SixtyFourBinS();

void *Cache_Aligned_Allocate();

void Cache_Aligned_Free();

 

int main () {

 

      int i, nmap, mapnum, numofsamps, nbytes;

      short phzsampdat[SAMPLE_MAX], dummysample;

      FILE *fileptr;

      long I0, Q0, OtherBinDataSIN, OtherBinDataCOS;

      char phzincdat[64], ampscaldat[64], URB[64];

      char UNP, PRB, PSVin, ODVin, ODVout0, PSVout0, DRFM0, binnumber;

      long long temp, binprogram;

      long long* dataa;

      long long* datab;

 

/* Timing variables. */

      double tstart, tend, tcume, ttotal;

      extern double second();

 

/* initialization */

      tstart = second();

      mapnum = 0;

      nmap = 1;

      numofsamps=0;

      dummysample=0;

 

/* Read in phase increment values. */

      if ((fileptr = fopen("datafiles/phzinc.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &phzincdat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in amplitude scaling values */

      if ((fileptr = fopen("datafiles/ampscal.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &ampscaldat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in pulse phase samples */

      if ((fileptr = fopen("datafiles/phzsamp.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

      numofsamps = 0;

      while (fscanf(fileptr, "%x", &phzsampdat[numofsamps]) != EOF)

      {

            numofsamps++;

      }

      fclose(fileptr);

     

    tend = second();

    tcume = tend - tstart;

    ttotal = tcume;

    printf ("\n Number of input samples: %d", numofsamps);

    printf ("\n Time for disk access of input data:  %19.10f", tcume);

 

      tstart = second();

      nbytes = (((numofsamps+PADDING*2+16)/4)*4)*8;

      dataa=Cache_Aligned_Allocate(nbytes);

      datab=Cache_Aligned_Allocate(nbytes);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to allocate the data caches for the MAP:  %19.10f", tcume);

 

    tstart = second();

/* pack the data as follows:

Input: formats, cycle begins when PRB=1, 1 format per clock

 ten bits of each bin: 10 |  9-5   |4-1 |

                       URB|PhaseInc|Gain|

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

more in same format up to bin63...

 63-8                              | 7-3   | 2    | 1  | 0

unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 65 if PSVin and UNP are taken high

*/

 

      for (i=0; i<64; i++){

            URB[i]=1;}/*set all bins to be used*/

      for (i=0; i<PADDING; i++){/*pad the control signals before and after*/

            dataa[i]=0; /*set PSVin, UNP, and PRB = 000 */

            dataa[i+numofsamps+PADDING+16]=0; /*set PSVin, UNP, and PRB = 000 */

            }

            PSVin=0;

            UNP=0;

            PRB=1; /* start the program sequence*/

 

      for (i=0;i<64;i=i+4){

            if (i>0) PRB=0;

     

            temp=((long long) URB[i+3] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+3] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+3] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i+2] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+2] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+2] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i+1] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+1] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+1] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i] & 0xFLL);

 

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[PADDING+i/4]=temp;}

 

      PSVin=1; /* start sample input */

      UNP=1; /* use new programming */

      temp=((long long) phzsampdat[0] & 0x1FLL);

 

      temp=temp<<1 | ((long long) PSVin & 0x1LL);

      temp=temp<<1 | ((long long) UNP & 0x1LL);

      temp=temp<<1 | ((long long) PRB & 0x1LL);

      dataa[16+PADDING]=temp;

 

      UNP=0;

      for (i = 1; i < numofsamps; i++) {

            temp=((long long) phzsampdat[i] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[i+PADDING+16]=temp;}

 

    tend = second();

 

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to pack the data for transfer to MAP:  %19.10f", tcume);

 

    tstart = second();

 

/* allocate map to this problem */

      if (map_allocate (nmap)) {

            fprintf (stdout, "Map allocation failed.\n");

      exit (1);

      }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP allocation:  %19.10f", tcume);

 

    tstart = second();

/* call compute */

      SixtyFourBinS (numofsamps+PADDING*2+16, dataa, datab, mapnum);

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP call:  %19.10f", tcume);

 

    tstart = second();

/* Open output file for writing. */

      if ((fileptr = fopen("datafiles/IandQout.txt", "w")) == NULL)

                  fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

 

/* put headers in output file */

      fprintf(fileptr, "Iout  Qout  ODVout PSVout DRFM\n");

      fprintf(fileptr, "----- ----- ------ ------ -----\n");

 

/* unpack the results and send to output*/

      for (i = 0; i < numofsamps+PADDING*2+16; i++) {

            DRFM0=datab[i] & 0x1FLL;

            I0=datab[i]>>5 & 0x1FFFFLL;

            Q0=datab[i]>>22 & 0x1FFFFLL;

            ODVout0=datab[i]>>39 & 0x1LL;

            PSVout0=datab[i]>>40 & 0x1LL;

            fprintf(fileptr, "%05X %05X   %01X      %01X    %02X\n", I0, Q0, ODVout0, PSVout0, DRFM0);

      }

   fclose (fileptr);

 

   tend = second();

   tcume = tend - tstart;

   ttotal = ttotal + tcume;

   printf ("\n Time to unpack results and send to output file:  %19.10f", tcume);

 

   tstart = second();

/* free the map */

      if (map_free (nmap)) {

             printf ("Map deallocation failed. \n");

        exit (1);

        }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the MAP:  %19.10f", tcume);

 

      tstart = second();

 

      Cache_Aligned_Free((char *)dataa);

      Cache_Aligned_Free((char *)datab);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the data arrays:  %19.10f", tcume);

    printf ("\n Total Time: %19.10f\n\n", ttotal);

}

 

q.   128 Bin .box file

module One28Bin (Input, Output, CLK) /* synthesis syn_black_box */ ;

      input [63:0] Input;

      output [63:0] Output;

      input CLK;

endmodule

 

r.   128 Bin .info file

BEGIN_DEF "One28_Bin"

      MACRO = "One28Bin";

      STATEFUL = NO;

      EXTERNAL = NO;

      PIPELINED = YES;

      LATENCY = 261;

     

      INPUTS = 1:

      I0 = INT 64 BITS (Input[63:0])

      ;

 

      OUTPUTS = 1:

      O0 = INT 64 BITS (Output[63:0])

      ;

 

      IN_SIGNAL : 1 BITS "CLK"="CLOCK";

END_DEF

 

s.   128 Bin .mc file

/* One28BinS.mc */

#include <libmap.h>

 

#define IBANK MAX_OBM_SIZE

 

void One28BinS ( int n, long long a[], long long b[], int mapno)

 

 {

      struct {

            long long al[IBANK];

      } banka;

      struct {

            long long bl[IBANK];

        } bankb;

 

      long long *al     = banka.al;

      long long *bl     = bankb.bl;

 

 

      int i, nbytes;

      /* nbytes = n*8;*/

      nbytes = (((n+3)/4)*4)*8;

 

      cm2obm_a(al, a, nbytes);

      wait_server_a();

 

      for (i = 0; i < n; i++) {

            One28_Bin(al[i], &bl[i]);

        }

 

      obm2cm_b (b, bl, nbytes);

      wait_server_b();

    }

 

t.   128 Bin .c file

/* main.c */

 

#include <stdio.h>

#include <sys/types.h>

#include <libmap.h>

 

#define SAMPLE_MAX 500000     /* Maximum number of phase samples. */

#define PADDING 128 /* number of padding sets before and after the samples */

void One28BinS();

void *Cache_Aligned_Allocate();

void Cache_Aligned_Free();

 

int main () {

 

      int i, nmap, mapnum, numofsamps, nbytes;

      short phzsampdat[SAMPLE_MAX], dummysample;

      FILE *fileptr;

      long I0, Q0, OtherBinDataSIN, OtherBinDataCOS;

      char phzincdat[128], ampscaldat[128], URB[128];

      char UNP, PRB, PSVin, ODVin, ODVout0, PSVout0, DRFM0, binnumber;

      long long temp, binprogram;

      long long* dataa;

      long long* datab;

 

/* Timing variables. */

      double tstart, tend, tcume, ttotal;

      extern double second();

 

/* initialization */

      tstart = second();

      mapnum = 0;

      nmap = 1;

      numofsamps=0;

      dummysample=0;

 

/* Read in phase increment values. */

      if ((fileptr = fopen("datafiles/phzinc.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzinc.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &phzincdat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in amplitude scaling values */

      if ((fileptr = fopen("datafiles/ampscal.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File ampscal.txt not found.\n\n");

      binnumber = 0;

      while (fscanf(fileptr, "%x", &ampscaldat[binnumber]) != EOF)

      {

            binnumber++;

      }

      fclose(fileptr);

 

/* Read in pulse phase samples */

      if ((fileptr = fopen("datafiles/phzsamp.txt", "r")) == NULL)

            fprintf(stderr, "\n\nTERMINAL FAULT:  File phzsamp.txt not found.\n\n");

      numofsamps = 0;

      while (fscanf(fileptr, "%x", &phzsampdat[numofsamps]) != EOF)

      {

            numofsamps++;

      }

      fclose(fileptr);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = tcume;

    printf ("\n Number of input samples: %d", numofsamps);

    printf ("\n Time for disk access of input data:  %19.10f", tcume);

 

      tstart = second();

      nbytes = (((numofsamps+PADDING*2+32)/4)*4)*8;

      dataa=Cache_Aligned_Allocate(nbytes);

      datab=Cache_Aligned_Allocate(nbytes);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to allocate the data caches for the MAP:  %19.10f", tcume);

 

    tstart = second();

/* pack the data as follows:

Input: formats, cycle begins when PRB=1, 1 format per clock

 ten bits of each bin: 10 |  9-5   |4-1 |

                       URB|PhaseInc|Gain|

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin3 | bin2 | bin1 | bin0 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin7 | bin6 | bin5 | bin4 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin11| bin10| bin9 | bin8 |sample |PSVin |UNP |PRB

 63-48 |47-38 |37-28 |27-18 | 17-8 | 7-3   | 2    | 1  | 0

unused | bin15| bin14| bin13| bin12|sample |PSVin |UNP |PRB

more in same format up to bin127...

 63-8                              | 7-3   | 2    | 1  | 0

unused                             |sample |PSVin |UNP |PRB

-- The first sample can be entered on clock 129 if PSVin and UNP are taken high

*/

 

      for (i=0; i<128; i++){

            URB[i]=1;}/*set all bins to be used*/

      for (i=0; i<PADDING; i++){/*pad the control signals before and after*/

            dataa[i]=0; /*set PSVin, UNP, and PRB = 000 */

            dataa[i+numofsamps+PADDING+32]=0; /*set PSVin, UNP, and PRB = 000 */

            }

            PSVin=0;

            UNP=0;

            PRB=1; /* start the program sequence*/

 

      for (i=0;i<128;i=i+4){

            if (i>0) PRB=0;

     

            temp=((long long) URB[i+3] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+3] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+3] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i+2] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+2] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+2] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i+1] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i+1] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i+1] & 0xFLL);

            temp=temp<<1 | ((long long) URB[i] & 0x1LL);

            temp=temp<<5 | ((long long) phzincdat[i] & 0x1FLL);

            temp=temp<<4 | ((long long) ampscaldat[i] & 0xFLL);

 

            temp=temp<<5 | ((long long) dummysample & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[PADDING+i/4]=temp;}

 

      PSVin=1; /* start sample input */

      UNP=1; /* use new programming */

      temp=((long long) phzsampdat[0] & 0x1FLL);

 

      temp=temp<<1 | ((long long) PSVin & 0x1LL);

      temp=temp<<1 | ((long long) UNP & 0x1LL);

      temp=temp<<1 | ((long long) PRB & 0x1LL);

      dataa[32+PADDING]=temp;

 

      UNP=0;

 

      for (i = 1; i < numofsamps; i++) {

            temp=((long long) phzsampdat[i] & 0x1FLL);

            temp=temp<<1 | ((long long) PSVin & 0x1LL);

            temp=temp<<1 | ((long long) UNP & 0x1LL);

            temp=temp<<1 | ((long long) PRB & 0x1LL);

            dataa[i+PADDING+32]=temp;}

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to pack the data for transfer to MAP:  %19.10f", tcume);

 

    tstart = second();

 

/* allocate map to this problem */

      if (map_allocate (nmap)) {

            fprintf (stdout, "Map allocation failed.\n");

      exit (1);

      }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP allocation:  %19.10f", tcume);

 

    tstart = second();

/* call compute */

      One28BinS (numofsamps+PADDING*2+32, dataa, datab, mapnum);

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time for MAP call:  %19.10f", tcume);

 

    tstart = second();

/* Open output file for writing. */

      if ((fileptr = fopen("datafiles/IandQout.txt", "w")) == NULL)

                  fprintf(stderr, "\n\nTERMINAL FAULT:  File IandQout.txt cannot be written.\n\n");

 

/* put headers in output file */

      fprintf(fileptr, "Iout  Qout  ODVout PSVout DRFM\n");

      fprintf(fileptr, "----- ----- ------ ------ -----\n");

 

/* unpack the results and send to output*/

      for (i = 0; i < numofsamps+PADDING*2+32; i++) {

            DRFM0=datab[i] & 0x1FLL;

            I0=datab[i]>>5 & 0x1FFFFLL;

            Q0=datab[i]>>22 & 0x1FFFFLL;

            ODVout0=datab[i]>>39 & 0x1LL;

            PSVout0=datab[i]>>40 & 0x1LL;

            fprintf(fileptr, "%05X %05X   %01X      %01X    %02X\n", I0, Q0, ODVout0, PSVout0, DRFM0);

      }

   fclose (fileptr);

 

   tend = second();

   tcume = tend - tstart;

   ttotal = ttotal + tcume;

   printf ("\n Time to unpack results and send to output file:  %19.10f", tcume);

 

   tstart = second();

/* free the map */

      if (map_free (nmap)) {

             printf ("Map deallocation failed. \n");

        exit (1);

        }

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the MAP:  %19.10f", tcume);

 

      tstart = second();

 

      Cache_Aligned_Free((char *)dataa);

      Cache_Aligned_Free((char *)datab);

 

    tend = second();

    tcume = tend - tstart;

    ttotal = ttotal + tcume;

    printf ("\n Time to free the data arrays:  %19.10f", tcume);

    printf ("\n Total Time: %19.10f\n\n", ttotal);

}

 

u.   example makefile (taken from 4 bins)

# ----------------------------------

# User defines FILES, MAPFILES, and BIN here

# ----------------------------------

FILES             = main.c

 

MAPFILES    = FourBinS.mc

 

BIN         = FourBinTest

 

# -----------------------------------

# User defined macros info supplied here

#

# (Leave commented out if not used)

# -----------------------------------

MACROS      = my_macro/fourbin.vhd

MY_BLKBOX   = my_macro/fourbin.box

MY_NGO_DIR = my_macro

MY_INFO     = my_macro/fourbin.info

# -----------------------------------

# User supplied MCC and MFTN flags

# -----------------------------------

 

MY_MCCFLAGS       =

MY_MFTNFLAGS      =

 

# -----------------------------------

# User supplied flags for C & Fortran compilers

# -----------------------------------

 

CC          = icc       # icc for Intel cc for Gnu

FC          = ifc # ifc for Intel f77 for Gnu

LD          = ifc # ifc for Intel cc  for Gnu

 

MY_CFLAGS   =

MY_FFLAGS   =

# -----------------------------------

# No modifications are required below

# -----------------------------------

MAKIN   ?= $(MC_ROOT)/opt/srcci/comp/lib/AppRules.make

include $(MAKIN)

 

v.   example phase sample input file (32 inputs)

00

01

02

03

04

05

06

07

08

09

0A

0B

0C

0D

0E

0F

10

11

12

13

14

15

16

17

18

19

1A

1B

1C

1D

1E

1F

 

w.   example range bin gain input file (4 bins)

2

1

2

1

 

x.   example range bin phase rotation input file (4 bins)

1F

11

1F

11

 

y.   example screen output (4 bins with 32 inputs)

Number of input samples: 32

 Time for disk access of input data:         0.0002677690

 Time to allocate the data caches for the MAP:         0.0000318932

 Time to pack the data for transfer to MAP:         0.0000015922

 Time for MAP allocation:         0.5351942658

 Time for MAP call:         0.0960569127

 Time to unpack results and send to output file:         0.0005680144

 Time to free the MAP:         1.0062198973

 Time to free the data arrays:         0.0000037104

 Total Time:        1.6383440550

 

z.   example output data file (4 bins with 32 inputs)

Iout  Qout  ODVout PSVout DRFM

----- ----- ------ ------ -----

00000 00000   0      1    00

00000 00000   0      1    01

00000 00000   0      1    02

00000 00000   0      1    03

0000F 0FFFC   1      1    04

00007 0FFFE   1      1    05

00016 0FFFB   1      1    06

0000E 0FFFF   1      1    07

0000E 00001   1      1    08

0000D 00005   1      1    09

0000B 00007   1      1    0A

0000A 0000A   1      1    0B

00007 0000C   1      1    0C

00005 0000D   1      1    0D

00002 0000E   1      1    0E

0FFFE 0000E   1      1    0F

0FFFB 0000E   1      1    10

0FFF7 0000D   1      1    11

0FFF5 0000B   1      1    12

0FFF2 0000A   1      1    13

0FFF0 00007   1      1    14

0FFEF 00005   1      1    15

0FFEE 00002   1      1    16

0FFEE 0FFFE   1      1    17

0FFEE 0FFFB   1      1    18

0FFEF 0FFF7   1      1    19

0FFF1 0FFF5   1      1    1A

0FFF2 0FFF2   1      1    1B

0FFF6 0FFF0   1      1    1C

0FFF8 0FFEF   1      1    1D

0FFFB 0FFEE   1      1    1E

0FFFF 0FFEE   1      1    1F

00001 0FFEE   1      0    00

00005 0FFEF   1      0    00

00007 0FFF1   1      0    00

0000A 0FFF2   1      0    00

0FFFD 0FFFA   1      0    00

00006 0FFFA   1      0    00

0FFF8 00000   1      0    00

00000 00000   0      0    00

00000 00000   0      0    00

00000 00000   0      0    00

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

THIS PAGE INTENTIONALLY LEFT BLANK

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

appendix D

This appendix contains the raw data collected from the three data sources.  The data was edited for format and presentation only by merging multiple data files and screen outputs into single text files.

A.   SRC-6E Macro data (4 bins)

 Number of input samples: 32

 Time for disk access of input data:         0.0002084887

 Time to allocate the data caches for the MAP:         0.0000334426

 Time to pack the data for transfer to MAP:         0.0000031780

 Time for MAP allocation:         0.5164666463

 Time for MAP call:         0.0953615193

 Time to unpack results and send to output file:         0.0012838777

 Time to free the MAP:         1.0058402661

 Time to free the data arrays:         0.0000023326

 Total Time:        1.6191997514

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002078484

 Time to allocate the data caches for the MAP:         0.0000330480

 Time to pack the data for transfer to MAP:         0.0000030328

 Time for MAP allocation:         0.5104117966

 Time for MAP call:         0.0956987063

 Time to unpack results and send to output file:         0.0033335369

 Time to free the MAP:         1.0039977920

 Time to free the data arrays:         0.0000048111

 Total Time:        1.6136905721

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002056765

 Time to allocate the data caches for the MAP:         0.0000328891

 Time to pack the data for transfer to MAP:         0.0000031771

 Time for MAP allocation:         0.4965487099

 Time for MAP call:         0.0957181978

 Time to unpack results and send to output file:         0.0004662391

 Time to free the MAP:         1.0063660767

 Time to free the data arrays:         0.0000022655

 Total Time:        1.5993432318

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002074470

 Time to allocate the data caches for the MAP:         0.0000328057

 Time to pack the data for transfer to MAP:         0.0000032612

 Time for MAP allocation:         0.5566975472

 Time for MAP call:         0.0953266612

 Time to unpack results and send to output file:         0.0004773409

 Time to free the MAP:         1.0166647502

 Time to free the data arrays:         0.0000021517

 Total Time:        1.6694119651

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002040481

 Time to allocate the data caches for the MAP:         0.0000319345

 Time to pack the data for transfer to MAP:         0.0000035124

 Time for MAP allocation:         0.4934991910

 Time for MAP call:         0.0953386407

 Time to unpack results and send to output file:         0.0004638645

 Time to free the MAP:         1.0170408654

 Time to free the data arrays:         0.0000024229

 Total Time:        1.6065844794

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002393220

 Time to allocate the data caches for the MAP:         0.0000324161

 Time to pack the data for transfer to MAP:         0.0000035736

 Time for MAP allocation:         0.5003027097

 Time for MAP call:         0.0955253627

 Time to unpack results and send to output file:         0.0035991581

 Time to free the MAP:         1.0033631459

 Time to free the data arrays:         0.0000020807

 Total Time:        1.6030677686

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002362756

 Time to allocate the data caches for the MAP:         0.0000333991

 Time to pack the data for transfer to MAP:         0.0000034639

 Time for MAP allocation:         0.6224254924

 Time for MAP call:         0.0953947966

 Time to unpack results and send to output file:         0.0020954084

 Time to free the MAP:         1.0053356335

 Time to free the data arrays:         0.0000019234

 Total Time:        1.7255263929

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002328618

 Time to allocate the data caches for the MAP:         0.0000356064

 Time to pack the data for transfer to MAP:         0.0000036541

 Time for MAP allocation:         0.4939500856

 Time for MAP call:         0.0953948186

 Time to unpack results and send to output file:         0.0005355580

 Time to free the MAP:         1.0068891326

 Time to free the data arrays:         0.0000020797

 Total Time:        1.5970437969

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002404833

 Time to allocate the data caches for the MAP:         0.0000330301

 Time to pack the data for transfer to MAP:         0.0000039446

 Time for MAP allocation:         0.4957746893

 Time for MAP call:         0.0953956086

 Time to unpack results and send to output file:         0.0005531784

 Time to free the MAP:         1.0068819918

 Time to free the data arrays:         0.0000019492

 Total Time:        1.5988848754

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002322863

 Time to allocate the data caches for the MAP:         0.0000330668

 Time to pack the data for transfer to MAP:         0.0000032001

 Time for MAP allocation:         0.4955973634

 Time for MAP call:         0.0957473678

 Time to unpack results and send to output file:         0.0036973444

 Time to free the MAP:         1.0133795050

 Time to free the data arrays:         0.0000019877

 Total Time:        1.6086921216

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002954546

 Time to allocate the data caches for the MAP:         0.0000327012

 Time to pack the data for transfer to MAP:         0.0000040170

 Time for MAP allocation:         0.4942348249

 Time for MAP call:         0.0948727678

 Time to unpack results and send to output file:         0.0007642954

 Time to free the MAP:         1.0171867082

 Time to free the data arrays:         0.0000022131

 Total Time:        1.6073929822

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002942937

 Time to allocate the data caches for the MAP:         0.0000337346

 Time to pack the data for transfer to MAP:         0.0000040882

 Time for MAP allocation:         0.4919614074

 Time for MAP call:         0.0958455724

 Time to unpack results and send to output file:         0.0007775028

 Time to free the MAP:         1.0161777539

 Time to free the data arrays:         0.0000022496

 Total Time:        1.6050966026

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003014999

 Time to allocate the data caches for the MAP:         0.0000329105

 Time to pack the data for transfer to MAP:         0.0000040881

 Time for MAP allocation:         0.4977084208

 Time for MAP call:         0.0950594501

 Time to unpack results and send to output file:         0.0007698328

 Time to free the MAP:         1.0070946452

 Time to free the data arrays:         0.0000022615

 Total Time:        1.6009731089

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002900069

 Time to allocate the data caches for the MAP:         0.0000335395

 Time to pack the data for transfer to MAP:         0.0000041137

 Time for MAP allocation:         0.4905814978

 Time for MAP call:         0.0954263863

 Time to unpack results and send to output file:         0.0007590848

 Time to free the MAP:         1.0166113938

 Time to free the data arrays:         0.0000019857

 Total Time:        1.6037080084

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002937946

 Time to allocate the data caches for the MAP:         0.0000330499

 Time to pack the data for transfer to MAP:         0.0000038525

 Time for MAP allocation:         0.4997816715

 Time for MAP call:         0.0952386696

 Time to unpack results and send to output file:         0.0007675327

 Time to free the MAP:         1.0168148382

 Time to free the data arrays:         0.0000024477

 Total Time:        1.6129358566

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004141619

 Time to allocate the data caches for the MAP:         0.0000335425

 Time to pack the data for transfer to MAP:         0.0000055092

 Time for MAP allocation:         0.4945142801

 Time for MAP call:         0.0956080591

 Time to unpack results and send to output file:         0.0074441405

 Time to free the MAP:         1.0097565020

 Time to free the data arrays:         0.0000021625

 Total Time:        1.6077783578

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004066345

 Time to allocate the data caches for the MAP:         0.0000336592

 Time to pack the data for transfer to MAP:         0.0000056030

 Time for MAP allocation:         0.4975832344

 Time for MAP call:         0.0953121734

 Time to unpack results and send to output file:         0.0071346043

 Time to free the MAP:         1.0102803051

 Time to free the data arrays:         0.0000023893

 Total Time:        1.6107586033

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004152791

 Time to allocate the data caches for the MAP:         0.0000348586

 Time to pack the data for transfer to MAP:         0.0000060359

 Time for MAP allocation:         0.4930090098

 Time for MAP call:         0.0956603360

 Time to unpack results and send to output file:         0.0011282015

 Time to free the MAP:         1.0056287277

 Time to free the data arrays:         0.0000020174

 Total Time:        1.5958844660

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004165005

 Time to allocate the data caches for the MAP:         0.0000347065

 Time to pack the data for transfer to MAP:         0.0000059323

 Time for MAP allocation:         0.4990793846

 Time for MAP call:         0.0957262570

 Time to unpack results and send to output file:         0.0012384173

 Time to free the MAP:         1.0155986599

 Time to free the data arrays:         0.0000024278

 Total Time:        1.6121022859

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004165359

 Time to allocate the data caches for the MAP:         0.0000340597

 Time to pack the data for transfer to MAP:         0.0000052273

 Time for MAP allocation:         0.5201277970

 Time for MAP call:         0.0958377271

 Time to unpack results and send to output file:         0.0017984349

 Time to free the MAP:         1.0149084253

 Time to free the data arrays:         0.0000025473

 Total Time:        1.6331307545

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006533940

 Time to allocate the data caches for the MAP:         0.0000397538

 Time to pack the data for transfer to MAP:         0.0000081049

 Time for MAP allocation:         0.4832733711

 Time for MAP call:         0.0958574916

 Time to unpack results and send to output file:         0.0033393714

 Time to free the MAP:         1.0133308016

 Time to free the data arrays:         0.0000023523

 Total Time:        1.5965046407

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006480492

 Time to allocate the data caches for the MAP:         0.0000409739

 Time to pack the data for transfer to MAP:         0.0000075036

 Time for MAP allocation:         0.5011440908

 Time for MAP call:         0.0957821485

 Time to unpack results and send to output file:         0.0033172593

 Time to free the MAP:         1.0134269165

 Time to free the data arrays:         0.0000022733

 Total Time:        1.6143692151

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006386451

 Time to allocate the data caches for the MAP:         0.0000400443

 Time to pack the data for transfer to MAP:         0.0000078980

 Time for MAP allocation:         0.4983086894

 Time for MAP call:         0.0957496894

 Time to unpack results and send to output file:         0.0154421452

 Time to free the MAP:         1.0113105172

 Time to free the data arrays:         0.0000021370

 Total Time:        1.6214997655

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006524692

 Time to allocate the data caches for the MAP:         0.0000428774

 Time to pack the data for transfer to MAP:         0.0000083262

 Time for MAP allocation:         0.4961099684

 Time for MAP call:         0.0959464872

 Time to unpack results and send to output file:         0.0227351512

 Time to free the MAP:         1.0039498007

 Time to free the data arrays:         0.0000021092

 Total Time:        1.6194471895

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006421120

 Time to allocate the data caches for the MAP:         0.0000426471

 Time to pack the data for transfer to MAP:         0.0000083097

 Time for MAP allocation:         0.5130592119

 Time for MAP call:         0.0958538257

 Time to unpack results and send to output file:         0.0154179145

 Time to free the MAP:         1.0112660712

 Time to free the data arrays:         0.0000024937

 Total Time:        1.6362925858

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011111130

 Time to allocate the data caches for the MAP:         0.0000570242

 Time to pack the data for transfer to MAP:         0.0000129485

 Time for MAP allocation:         0.6785891002

 Time for MAP call:         0.1518359193

 Time to unpack results and send to output file:         0.0637012725

 Time to free the MAP:         1.0022069545

 Time to free the data arrays:         0.0000019086

 Total Time:        1.8975162408

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011128639

 Time to allocate the data caches for the MAP:         0.0000578275

 Time to pack the data for transfer to MAP:         0.0000129324

 Time for MAP allocation:         0.5000961085

 Time for MAP call:         0.0958417615

 Time to unpack results and send to output file:         0.0076207878

 Time to free the MAP:         1.0089172212

 Time to free the data arrays:         0.0000018086

 Total Time:        1.6136613114

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011077705

 Time to allocate the data caches for the MAP:         0.0000647734

 Time to pack the data for transfer to MAP:         0.0000131728

 Time for MAP allocation:         0.4876909435

 Time for MAP call:         0.0959412700

 Time to unpack results and send to output file:         0.0065343911

 Time to free the MAP:         1.0100464751

 Time to free the data arrays:         0.0000019858

 Total Time:        1.6014007820

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011135186

 Time to allocate the data caches for the MAP:         0.0000569741

 Time to pack the data for transfer to MAP:         0.0000129600

 Time for MAP allocation:         0.4821215066

 Time for MAP call:         0.0958638313

 Time to unpack results and send to output file:         0.0075461004

 Time to free the MAP:         1.0091087266

 Time to free the data arrays:         0.0000019747

 Total Time:        1.5958255923

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011116290

 Time to allocate the data caches for the MAP:         0.0000559289

 Time to pack the data for transfer to MAP:         0.0000132181

 Time for MAP allocation:         0.6231542741

 Time for MAP call:         0.0957496962

 Time to unpack results and send to output file:         0.0123621364

 Time to free the MAP:         1.0044305101

 Time to free the data arrays:         0.0000020270

 Total Time:        1.7368794198

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020916183

 Time to allocate the data caches for the MAP:         0.0000901528

 Time to pack the data for transfer to MAP:         0.0000260499

 Time for MAP allocation:         0.5149962501

 Time for MAP call:         0.0961126186

 Time to unpack results and send to output file:         0.0209217987

 Time to free the MAP:         1.0054714421

 Time to free the data arrays:         0.0000021486

 Total Time:        1.6397120791

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020824559

 Time to allocate the data caches for the MAP:         0.0000903800

 Time to pack the data for transfer to MAP:         0.0000254874

 Time for MAP allocation:         0.4974595414

 Time for MAP call:         0.0960430990

 Time to unpack results and send to output file:         0.0282576866

 Time to free the MAP:         1.0881452921

 Time to free the data arrays:         0.0000019264

 Total Time:        1.7121058688

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020932974

 Time to allocate the data caches for the MAP:         0.0000910958

 Time to pack the data for transfer to MAP:         0.0000263999

 Time for MAP allocation:         0.4926326820

 Time for MAP call:         0.0959650401

 Time to unpack results and send to output file:         0.0156554965

 Time to free the MAP:         1.0108778882

 Time to free the data arrays:         0.0000019402

 Total Time:        1.6173438402

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020821933

 Time to allocate the data caches for the MAP:         0.0000856771

 Time to pack the data for transfer to MAP:         0.0000250056

 Time for MAP allocation:         0.4886453049

 Time for MAP call:         0.0956541829

 Time to unpack results and send to output file:         0.0192058023

 Time to free the MAP:         1.0076645346

 Time to free the data arrays:         0.0000023833

 Total Time:        1.6133650840

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020821388

 Time to allocate the data caches for the MAP:         0.0000859965

 Time to pack the data for transfer to MAP:         0.0000265323

 Time for MAP allocation:         0.4972438066

 Time for MAP call:         0.0954610106

 Time to unpack results and send to output file:         0.0060951959

 Time to free the MAP:         1.0012624153

 Time to free the data arrays:         0.0000026124

 Total Time:        1.6022597085

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039855344

 Time to allocate the data caches for the MAP:         0.0001454146

 Time to pack the data for transfer to MAP:         0.0000535839

 Time for MAP allocation:         0.4965537333

 Time for MAP call:         0.0957045235

 Time to unpack results and send to output file:         0.0126587250

 Time to free the MAP:         1.0044503288

 Time to free the data arrays:         0.0000026354

 Total Time:        1.6135544790

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039791423

 Time to allocate the data caches for the MAP:         0.0001418835

 Time to pack the data for transfer to MAP:         0.0000448415

 Time for MAP allocation:         0.4903939462

 Time for MAP call:         0.0958149879

 Time to unpack results and send to output file:         0.0464646419

 Time to free the MAP:         1.0205435471

 Time to free the data arrays:         0.0000024880

 Total Time:        1.6573854783

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039929757

 Time to allocate the data caches for the MAP:         0.0001441353

 Time to pack the data for transfer to MAP:         0.0000457590

 Time for MAP allocation:         0.4920268677

 Time for MAP call:         0.0956457284

 Time to unpack results and send to output file:         0.0244508066

 Time to free the MAP:         1.0027754950

 Time to free the data arrays:         0.0000026818

 Total Time:        1.6190844494

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039834669

 Time to allocate the data caches for the MAP:         0.0001419437

 Time to pack the data for transfer to MAP:         0.0000453535

 Time for MAP allocation:         0.4957230670

 Time for MAP call:         0.0959734361

 Time to unpack results and send to output file:         0.0122753341

 Time to free the MAP:         1.0144876788

 Time to free the data arrays:         0.0000026629

 Total Time:        1.6226329430

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039881454

 Time to allocate the data caches for the MAP:         0.0001435438

 Time to pack the data for transfer to MAP:         0.0000469605

 Time for MAP allocation:         0.4950999535

 Time for MAP call:         0.0954072981

 Time to unpack results and send to output file:         0.0213319817

 Time to free the MAP:         1.0061055590

 Time to free the data arrays:         0.0000027790

 Total Time:        1.6221262210

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077267974

 Time to allocate the data caches for the MAP:         0.0002556030

 Time to pack the data for transfer to MAP:         0.0001100657

 Time for MAP allocation:         0.4976358002

 Time for MAP call:         0.0961669415

 Time to unpack results and send to output file:         0.0237152558

 Time to free the MAP:         1.0127127591

 Time to free the data arrays:         0.0000022396

 Total Time:        1.6383254622

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077963406

 Time to allocate the data caches for the MAP:         0.0002558858

 Time to pack the data for transfer to MAP:         0.0001045743

 Time for MAP allocation:         0.4911085308

 Time for MAP call:         0.0959338374

 Time to unpack results and send to output file:         0.0238329170

 Time to free the MAP:         1.0130410420

 Time to free the data arrays:         0.0000024701

 Total Time:        1.6320755980

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077859228

 Time to allocate the data caches for the MAP:         0.0002738300

 Time to pack the data for transfer to MAP:         0.0001272394

 Time for MAP allocation:         0.4921577856

 Time for MAP call:         0.0958763216

 Time to unpack results and send to output file:         0.0237751291

 Time to free the MAP:         1.0131296077

 Time to free the data arrays:         0.0000024157

 Total Time:        1.6331282519

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077333828

 Time to allocate the data caches for the MAP:         0.0002921608

 Time to pack the data for transfer to MAP:         0.0001764615

 Time for MAP allocation:         0.4940546044

 Time for MAP call:         0.0957720181

 Time to unpack results and send to output file:         0.0561388992

 Time to free the MAP:         1.0108450090

 Time to free the data arrays:         0.0000023665

 Total Time:        1.6650149021

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077926028

 Time to allocate the data caches for the MAP:         0.0002785594

 Time to pack the data for transfer to MAP:         0.0001506419

 Time for MAP allocation:         0.4923053186

 Time for MAP call:         0.0959226640

 Time to unpack results and send to output file:         0.0237458469

 Time to free the MAP:         1.0131476923

 Time to free the data arrays:         0.0000027857

 Total Time:        1.6333461116

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0153927654

 Time to allocate the data caches for the MAP:         0.0005575859

 Time to pack the data for transfer to MAP:         0.0003431856

 Time for MAP allocation:         0.5183157085

 Time for MAP call:         0.0967833299

 Time to unpack results and send to output file:         0.0501642945

 Time to free the MAP:         1.0058229146

 Time to free the data arrays:         0.0001683618

 Total Time:        1.6875481461

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155295176

 Time to allocate the data caches for the MAP:         0.0005789198

 Time to pack the data for transfer to MAP:         0.0003428880

 Time for MAP allocation:         0.4936960370

 Time for MAP call:         0.0964770900

 Time to unpack results and send to output file:         0.0466447413

 Time to free the MAP:         1.0396878721

 Time to free the data arrays:         0.0001092585

 Total Time:        1.6930663242

 Number of input samples: 16384

 Time for disk access of input data:         0.0155252111

 Time to allocate the data caches for the MAP:         0.0005625006

 Time to pack the data for transfer to MAP:         0.0003430452

 Time for MAP allocation:         0.4941918185

 Time for MAP call:         0.0964758853

 Time to unpack results and send to output file:         0.0641993501

 Time to free the MAP:         1.0120672238

 Time to free the data arrays:         0.0001677100

 Total Time:        1.6835327446

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0153412572

 Time to allocate the data caches for the MAP:         0.0005699935

 Time to pack the data for transfer to MAP:         0.0003478272

 Time for MAP allocation:         0.4921738054

 Time for MAP call:         0.0965295781

 Time to unpack results and send to output file:         0.0482773540

 Time to free the MAP:         1.0079964124

 Time to free the data arrays:         0.0001060102

 Total Time:        1.6613422381

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155299134

 Time to allocate the data caches for the MAP:         0.0005738538

 Time to pack the data for transfer to MAP:         0.0003463518

 Time for MAP allocation:         0.4914332401

 Time for MAP call:         0.0966964633

 Time to unpack results and send to output file:         0.0475771045

 Time to free the MAP:         1.0185267845

 Time to free the data arrays:         0.0001017322

 Total Time:        1.6707854435

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0306247147

 Time to allocate the data caches for the MAP:         0.0013589453

 Time to pack the data for transfer to MAP:         0.0010181843

 Time for MAP allocation:         0.5153990916

 Time for MAP call:         0.0981820682

 Time to unpack results and send to output file:         0.1095072731

 Time to free the MAP:         1.0151180013

 Time to free the data arrays:         0.0002542540

 Total Time:        1.7714625325

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0306110801

 Time to allocate the data caches for the MAP:         0.0013458199

 Time to pack the data for transfer to MAP:         0.0010553453

 Time for MAP allocation:         0.4969847347

 Time for MAP call:         0.0974834155

 Time to unpack results and send to output file:         0.1405144958

 Time to free the MAP:         1.0646334495

 Time to free the data arrays:         0.0002433229

 Total Time:        1.8328716636

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0309797931

 Time to allocate the data caches for the MAP:         0.0013334095

 Time to pack the data for transfer to MAP:         0.0010035532

 Time for MAP allocation:         0.5512681785

 Time for MAP call:         0.0976202144

 Time to unpack results and send to output file:         0.1002687165

 Time to free the MAP:         1.0048950271

 Time to free the data arrays:         0.0002499901

 Total Time:        1.7876188825

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0306155006

 Time to allocate the data caches for the MAP:         0.0013408775

 Time to pack the data for transfer to MAP:         0.0010513747

 Time for MAP allocation:         0.4909358202

 Time for MAP call:         0.0976936156

 Time to unpack results and send to output file:         0.1810896878

 Time to free the MAP:         1.0340174406

 Time to free the data arrays:         0.0002396957

 Total Time:        1.8369840129

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0309932032

 Time to allocate the data caches for the MAP:         0.0013457405

 Time to pack the data for transfer to MAP:         0.0010066531

 Time for MAP allocation:         0.4916068170

 Time for MAP call:         0.0977127539

 Time to unpack results and send to output file:         0.1466750425

 Time to free the MAP:         1.0084496646

 Time to free the data arrays:         0.0002433417

 Total Time:        1.7780332165

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0621257024

 Time to allocate the data caches for the MAP:         0.0028639874

 Time to pack the data for transfer to MAP:         0.0022877009

 Time for MAP allocation:         0.4985954243

 Time for MAP call:         0.1003477353

 Time to unpack results and send to output file:         0.2703358518

 Time to free the MAP:         1.0221247504

 Time to free the data arrays:         0.0003672071

 Total Time:        1.9590483597

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0610921094

 Time to allocate the data caches for the MAP:         0.0029188997

 Time to pack the data for transfer to MAP:         0.0023061314

 Time for MAP allocation:         0.6371503016

 Time for MAP call:         0.1004620185

 Time to unpack results and send to output file:         0.2713422303

 Time to free the MAP:         1.0109877242

 Time to free the data arrays:         0.0004029548

 Total Time:        2.0866623698

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0620745867

 Time to allocate the data caches for the MAP:         0.0029625138

 Time to pack the data for transfer to MAP:         0.0023338632

 Time for MAP allocation:         0.4973293074

 Time for MAP call:         0.1002779455

 Time to unpack results and send to output file:         0.3466862810

 Time to free the MAP:         1.0058548226

 Time to free the data arrays:         0.0003887686

 Total Time:        2.0179080888

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0612080591

 Time to allocate the data caches for the MAP:         0.0029273008

 Time to pack the data for transfer to MAP:         0.0023182945

 Time for MAP allocation:         0.4908245638

 Time for MAP call:         0.1001162764

 Time to unpack results and send to output file:         0.2686706407

 Time to free the MAP:         1.0640293193

 Time to free the data arrays:         0.0004108055

 Total Time:        1.9905052602

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0620280928

 Time to allocate the data caches for the MAP:         0.0028908550

 Time to pack the data for transfer to MAP:         0.0023225218

 Time for MAP allocation:         0.4963764966

 Time for MAP call:         0.0999079221

 Time to unpack results and send to output file:         0.2695025590

 Time to free the MAP:         1.0134212143

 Time to free the data arrays:         0.0003826644

 Total Time:        1.9468323260

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1240888252

 Time to allocate the data caches for the MAP:         0.0060260667

 Time to pack the data for transfer to MAP:         0.0046543345

 Time for MAP allocation:         0.4962011388

 Time for MAP call:         0.1048911635

 Time to unpack results and send to output file:         0.7489439061

 Time to free the MAP:         1.0089680919

 Time to free the data arrays:         0.0006547378

 Total Time:        2.4944282644

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1226398554

 Time to allocate the data caches for the MAP:         0.0060558375

 Time to pack the data for transfer to MAP:         0.0046348261

 Time for MAP allocation:         0.5011602360

 Time for MAP call:         0.1050545690

 Time to unpack results and send to output file:         0.5425826756

 Time to free the MAP:         1.0551549533

 Time to free the data arrays:         0.0006473670

 Total Time:        2.3379303198

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1232239739

 Time to allocate the data caches for the MAP:         0.0061246446

 Time to pack the data for transfer to MAP:         0.0046658815

 Time for MAP allocation:         0.5127014323

 Time for MAP call:         0.1049743181

 Time to unpack results and send to output file:         0.5470922312

 Time to free the MAP:         1.0107609272

 Time to free the data arrays:         0.0006337353

 Total Time:        2.3101771440

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1219592309

 Time to allocate the data caches for the MAP:         0.0061186628

 Time to pack the data for transfer to MAP:         0.0046495533

 Time for MAP allocation:         0.5024024120

 Time for MAP call:         0.1048433959

 Time to unpack results and send to output file:         0.5247122045

 Time to free the MAP:         1.0033027872

 Time to free the data arrays:         0.0006578507

 Total Time:        2.2686460972

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1231231173

 Time to allocate the data caches for the MAP:         0.0060207783

 Time to pack the data for transfer to MAP:         0.0046499447

 Time for MAP allocation:         0.5162492643

 Time for MAP call:         0.1050400048

 Time to unpack results and send to output file:         0.5865585899

 Time to free the MAP:         1.0311949011

 Time to free the data arrays:         0.0006193917

 Total Time:        2.3734559920

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2466617599

 Time to allocate the data caches for the MAP:         0.0123152012

 Time to pack the data for transfer to MAP:         0.0092960705

 Time for MAP allocation:         0.5196115292

 Time for MAP call:         0.1271627665

 Time to unpack results and send to output file:         1.3435243927

 Time to free the MAP:         1.1221123164

 Time to free the data arrays:         0.0011707427

 Total Time:        3.3818547790

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2453111536

 Time to allocate the data caches for the MAP:         0.0122500562

 Time to pack the data for transfer to MAP:         0.0093190914

 Time for MAP allocation:         0.4951755201

 Time for MAP call:         0.1138315872

 Time to unpack results and send to output file:         1.3158807391

 Time to free the MAP:         1.0530768107

 Time to free the data arrays:         0.0012642812

 Total Time:        3.2461092394

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2476685643

 Time to allocate the data caches for the MAP:         0.0122636819

 Time to pack the data for transfer to MAP:         0.0093553140

 Time for MAP allocation:         0.4953095370

 Time for MAP call:         0.1136923408

 Time to unpack results and send to output file:         1.0785156223

 Time to free the MAP:         1.0204131452

 Time to free the data arrays:         0.0011486090

 Total Time:        2.9783668145

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2496722639

 Time to allocate the data caches for the MAP:         0.0148617119

 Time to pack the data for transfer to MAP:         0.0101257402

 Time for MAP allocation:         0.5077033972

 Time for MAP call:         0.1143577781

 Time to unpack results and send to output file:         1.2506356603

 Time to free the MAP:         1.0677469949

 Time to free the data arrays:         0.0012172100

 Total Time:        3.2163207564

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2502859328

 Time to allocate the data caches for the MAP:         0.0148947175

 Time to pack the data for transfer to MAP:         0.0101888936

 Time for MAP allocation:         0.4935576584

 Time for MAP call:         0.1137587526

 Time to unpack results and send to output file:         1.1830993035

 Time to free the MAP:         1.0059399260

 Time to free the data arrays:         0.0011548989

 Total Time:        3.0728800833

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4731001630

 Time to allocate the data caches for the MAP:         0.0235309141

 Time to pack the data for transfer to MAP:         0.0176773566

 Time for MAP allocation:         0.5148518025

 Time for MAP call:         0.1313982537

 Time to unpack results and send to output file:         2.3861514647

 Time to free the MAP:         1.0132672688

 Time to free the data arrays:         0.0026107787

 Total Time:        4.5625880020

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4714139798

 Time to allocate the data caches for the MAP:         0.0236509810

 Time to pack the data for transfer to MAP:         0.0177488333

 Time for MAP allocation:         0.5134281958

 Time for MAP call:         0.1304782950

 Time to unpack results and send to output file:         2.2848228798

 Time to free the MAP:         1.0875396440

 Time to free the data arrays:         0.0022918066

 Total Time:        4.5313746153

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4687111601

 Time to allocate the data caches for the MAP:         0.0235427193

 Time to pack the data for transfer to MAP:         0.0177357129

 Time for MAP allocation:         0.4944360901

 Time for MAP call:         0.1303860471

 Time to unpack results and send to output file:         2.4698479666

 Time to free the MAP:         1.0025578095

 Time to free the data arrays:         0.0022914119

 Total Time:        4.6095089176

 

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4664477413

 Time to allocate the data caches for the MAP:         0.0235285488

 Time to pack the data for transfer to MAP:         0.0177333808

 Time for MAP allocation:         0.4916631167

 Time for MAP call:         0.1312532704

 Time to unpack results and send to output file:         2.5299912385

 Time to free the MAP:         1.0215247635

 Time to free the data arrays:         0.0022811463

 Total Time:        4.6844232063

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4662291971

 Time to allocate the data caches for the MAP:         0.0235175280

 Time to pack the data for transfer to MAP:         0.0177683505

 Time for MAP allocation:         0.4979370927

 Time for MAP call:         0.1308984664

 Time to unpack results and send to output file:         2.2857460581

 Time to free the MAP:         1.0061519847

 Time to free the data arrays:         0.0022496353

 Total Time:        4.4304983129

 

B.   SRC-6E C program data (4 Bins)

Time to complete 32 samples: 0.1400 seconds.

Time to complete 32 samples: 0.1300 seconds.

Time to complete 32 samples: 0.1300 seconds.

Time to complete 32 samples: 0.1300 seconds.

Time to complete 32 samples: 0.1400 seconds.

 

Time to complete 64 samples: 0.1400 seconds.

Time to complete 64 samples: 0.1200 seconds.

Time to complete 64 samples: 0.1200 seconds.

Time to complete 64 samples: 0.1100 seconds.

Time to complete 64 samples: 0.1200 seconds.

 

Time to complete 128 samples: 0.1200 seconds.

Time to complete 128 samples: 0.1200 seconds.

Time to complete 128 samples: 0.1200 seconds.

Time to complete 128 samples: 0.1500 seconds.

Time to complete 128 samples: 0.1200 seconds.

 

Time to complete 256 samples: 0.1200 seconds.

Time to complete 256 samples: 0.1200 seconds.

Time to complete 256 samples: 0.1200 seconds.

Time to complete 256 samples: 0.1200 seconds.

Time to complete 256 samples: 0.1200 seconds.

 

Time to complete 512 samples: 0.1200 seconds.

Time to complete 512 samples: 0.1200 seconds.

Time to complete 512 samples: 0.1200 seconds.

Time to complete 512 samples: 0.1200 seconds.

Time to complete 512 samples: 0.1200 seconds.

 

Time to complete 1024 samples: 0.1200 seconds.

Time to complete 1024 samples: 0.1200 seconds.

Time to complete 1024 samples: 0.1200 seconds.

Time to complete 1024 samples: 0.1300 seconds.

Time to complete 1024 samples: 0.1200 seconds.

 

Time to complete 2048 samples: 0.1200 seconds.

Time to complete 2048 samples: 0.1300 seconds.

Time to complete 2048 samples: 0.1300 seconds.

Time to complete 2048 samples: 0.1200 seconds.

Time to complete 2048 samples: 0.1300 seconds.

 

Time to complete 4096 samples: 0.1300 seconds.

Time to complete 4096 samples: 0.1300 seconds.

Time to complete 4096 samples: 0.1300 seconds.

Time to complete 4096 samples: 0.1400 seconds.

Time to complete 4096 samples: 0.1400 seconds.

 

Time to complete 8192 samples: 0.1500 seconds.

Time to complete 8192 samples: 0.1500 seconds.

Time to complete 8192 samples: 0.1500 seconds.

Time to complete 8192 samples: 0.1500 seconds.

Time to complete 8192 samples: 0.1500 seconds.

 

Time to complete 16384 samples: 0.2100 seconds.

Time to complete 16384 samples: 0.1800 seconds.

Time to complete 16384 samples: 0.1600 seconds.

Time to complete 16384 samples: 0.1800 seconds.

Time to complete 16384 samples: 0.1800 seconds.

 

Time to complete 32768 samples: 0.2600 seconds.

Time to complete 32768 samples: 0.2500 seconds.

Time to complete 32768 samples: 0.2600 seconds.

Time to complete 32768 samples: 0.2600 seconds.

Time to complete 32768 samples: 0.2600 seconds.

 

Time to complete 65536 samples: 0.3800 seconds.

Time to complete 65536 samples: 0.3500 seconds.

Time to complete 65536 samples: 0.3500 seconds.

Time to complete 65536 samples: 0.3500 seconds.

Time to complete 65536 samples: 0.3700 seconds.

 

Time to complete 131072 samples: 0.6000 seconds.

Time to complete 131072 samples: 0.6700 seconds.

Time to complete 131072 samples: 0.6600 seconds.

Time to complete 131072 samples: 0.6300 seconds.

Time to complete 131072 samples: 0.6100 seconds.

 

Time to complete 262144 samples: 1.1200 seconds.

Time to complete 262144 samples: 1.0700 seconds.

Time to complete 262144 samples: 1.2800 seconds.

Time to complete 262144 samples: 1.1300 seconds.

Time to complete 262144 samples: 1.1800 seconds.

 

Time to complete 500000 samples: 2.0300 seconds.

Time to complete 500000 samples: 2.0400 seconds.

Time to complete 500000 samples: 2.0400 seconds.

Time to complete 500000 samples: 2.0300 seconds.

Time to complete 500000 samples: 2.0700 seconds.

 

C.   Windows C program data (4 bins)

Time to complete 32 samples: 0.0310 seconds.

Time to complete 32 samples: 0.0460 seconds.

Time to complete 32 samples: 0.0460 seconds.

Time to complete 32 samples: 0.0460 seconds.

Time to complete 32 samples: 0.0460 seconds.

 

Time to complete 64 samples: 0.0460 seconds.

Time to complete 64 samples: 0.0460 seconds.

Time to complete 64 samples: 0.0460 seconds.

Time to complete 64 samples: 0.0460 seconds.

Time to complete 64 samples: 0.0460 seconds.

 

Time to complete 128 samples: 0.0310 seconds.

Time to complete 128 samples: 0.0460 seconds.

Time to complete 128 samples: 0.0460 seconds.

Time to complete 128 samples: 0.0460 seconds.

Time to complete 128 samples: 0.0460 seconds.

 

Time to complete 256 samples: 0.0460 seconds.

Time to complete 256 samples: 0.0460 seconds.

Time to complete 256 samples: 0.0460 seconds.

Time to complete 256 samples: 0.0620 seconds.

Time to complete 256 samples: 0.0620 seconds.

 

Time to complete 512 samples: 0.0460 seconds.

Time to complete 512 samples: 0.0460 seconds.

Time to complete 512 samples: 0.0460 seconds.

Time to complete 512 samples: 0.0460 seconds.

Time to complete 512 samples: 0.0620 seconds.

 

Time to complete 1024 samples: 0.0620 seconds.

Time to complete 1024 samples: 0.0620 seconds.

Time to complete 1024 samples: 0.0620 seconds.

Time to complete 1024 samples: 0.0620 seconds.

Time to complete 1024 samples: 0.0620 seconds.

 

Time to complete 2048 samples: 0.0620 seconds.

Time to complete 2048 samples: 0.0620 seconds.

Time to complete 2048 samples: 0.0620 seconds.

Time to complete 2048 samples: 0.0620 seconds.

Time to complete 2048 samples: 0.0620 seconds.

 

Time to complete 4096 samples: 0.0620 seconds.

Time to complete 4096 samples: 0.0620 seconds.

Time to complete 4096 samples: 0.0620 seconds.

Time to complete 4096 samples: 0.0780 seconds.

Time to complete 4096 samples: 0.0780 seconds.

 

Time to complete 8192 samples: 0.0930 seconds.

Time to complete 8192 samples: 0.0930 seconds.

Time to complete 8192 samples: 0.0930 seconds.

Time to complete 8192 samples: 0.0930 seconds.

Time to complete 8192 samples: 0.0930 seconds.

 

Time to complete 16384 samples: 0.1240 seconds.

Time to complete 16384 samples: 0.1240 seconds.

Time to complete 16384 samples: 0.1400 seconds.

Time to complete 16384 samples: 0.1400 seconds.

Time to complete 16384 samples: 0.1400 seconds.

 

Time to complete 32768 samples: 0.2030 seconds.

Time to complete 32768 samples: 0.2180 seconds.

Time to complete 32768 samples: 0.2180 seconds.

Time to complete 32768 samples: 0.2180 seconds.

Time to complete 32768 samples: 0.2180 seconds.

 

Time to complete 65536 samples: 0.3280 seconds.

Time to complete 65536 samples: 0.3430 seconds.

Time to complete 65536 samples: 0.3430 seconds.

Time to complete 65536 samples: 0.3430 seconds.

Time to complete 65536 samples: 0.4370 seconds.

 

Time to complete 131072 samples: 0.5780 seconds.

Time to complete 131072 samples: 0.5780 seconds.

Time to complete 131072 samples: 0.5930 seconds.

Time to complete 131072 samples: 0.5930 seconds.

Time to complete 131072 samples: 0.5930 seconds.

 

Time to complete 262144 samples: 1.0620 seconds.

Time to complete 262144 samples: 1.0780 seconds.

Time to complete 262144 samples: 1.0780 seconds.

Time to complete 262144 samples: 1.0780 seconds.

Time to complete 262144 samples: 1.1240 seconds.

 

Time to complete 500000 samples: 2.0310 seconds.

Time to complete 500000 samples: 2.0310 seconds.

Time to complete 500000 samples: 2.8900 seconds.

Time to complete 500000 samples: 3.1710 seconds.

Time to complete 500000 samples: 3.1710 seconds.

 

d.   SRC-6E Macro data (8 bins)

Number of input samples: 32

 Time for disk access of input data:         0.0002173493

 Time to allocate the data caches for the MAP:         0.0000340044

 Time to pack the data for transfer to MAP:         0.0000042628

 Time for MAP allocation:         0.5121813158

 Time for MAP call:         0.0952716917

 Time to unpack results and send to output file:         0.0012925879

 Time to free the MAP:         1.0158998537

 Time to free the data arrays:         0.0000021787

 Total Time:        1.6249032444

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002152342

 Time to allocate the data caches for the MAP:         0.0000331639

 Time to pack the data for transfer to MAP:         0.0000039842

 Time for MAP allocation:         0.5047355495

 Time for MAP call:         0.0950798188

 Time to unpack results and send to output file:         0.0012791458

 Time to free the MAP:         1.0171446642

 Time to free the data arrays:         0.0000017729

 Total Time:        1.6184933335

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002143523

 Time to allocate the data caches for the MAP:         0.0000348240

 Time to pack the data for transfer to MAP:         0.0000043688

 Time for MAP allocation:         0.5008277502

 Time for MAP call:         0.0948056557

 Time to unpack results and send to output file:         0.0012747021

 Time to free the MAP:         1.0164255004

 Time to free the data arrays:         0.0000021934

 Total Time:        1.6135893468

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002203397

 Time to allocate the data caches for the MAP:         0.0000336396

 Time to pack the data for transfer to MAP:         0.0000040829

 Time for MAP allocation:         0.4982569260

 Time for MAP call:         0.0948616971

 Time to unpack results and send to output file:         0.0012855047

 Time to free the MAP:         1.0164005884

 Time to free the data arrays:         0.0000019331

 Total Time:        1.6110647114

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002188673

 Time to allocate the data caches for the MAP:         0.0000349112

 Time to pack the data for transfer to MAP:         0.0000038261

 Time for MAP allocation:         0.4996310823

 Time for MAP call:         0.0948475544

 Time to unpack results and send to output file:         0.0012727185

 Time to free the MAP:         1.0164024122

 Time to free the data arrays:         0.0000022644

 Total Time:        1.6124136363

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002460065

 Time to allocate the data caches for the MAP:         0.0000329541

 Time to pack the data for transfer to MAP:         0.0000044600

 Time for MAP allocation:         0.4879252331

 Time for MAP call:         0.0951282708

 Time to unpack results and send to output file:         0.0084905738

 Time to free the MAP:         1.0088918964

 Time to free the data arrays:         0.0000020469

 Total Time:        1.6007214416

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002456368

 Time to allocate the data caches for the MAP:         0.0000341686

 Time to pack the data for transfer to MAP:         0.0000045668

 Time for MAP allocation:         0.4914083521

 Time for MAP call:         0.0952732749

 Time to unpack results and send to output file:         0.0099594405

 Time to free the MAP:         1.0072816738

 Time to free the data arrays:         0.0000018649

 Total Time:        1.6042089784

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002550147

 Time to allocate the data caches for the MAP:         0.0000713006

 Time to pack the data for transfer to MAP:         0.0000043343

 Time for MAP allocation:         0.4963849197

 Time for MAP call:         0.0967784431

 Time to unpack results and send to output file:         0.0104698295

 Time to free the MAP:         1.0052709356

 Time to free the data arrays:         0.0000018500

 Total Time:        1.6092366275

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002449476

 Time to allocate the data caches for the MAP:         0.0000330472

 Time to pack the data for transfer to MAP:         0.0000046743

 Time for MAP allocation:         0.4997620770

 Time for MAP call:         0.0951259291

 Time to unpack results and send to output file:         0.0097848665

 Time to free the MAP:         1.0075548765

 Time to free the data arrays:         0.0000018302

 Total Time:        1.6125122485

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002485551

 Time to allocate the data caches for the MAP:         0.0000328096

 Time to pack the data for transfer to MAP:         0.0000049551

 Time for MAP allocation:         0.4945978916

 Time for MAP call:         0.0949539896

 Time to unpack results and send to output file:         0.0021664985

 Time to free the MAP:         1.0053717044

 Time to free the data arrays:         0.0000021934

 Total Time:        1.5973785972

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003071921

 Time to allocate the data caches for the MAP:         0.0000351267

 Time to pack the data for transfer to MAP:         0.0000054952

 Time for MAP allocation:         0.4843192134

 Time for MAP call:         0.0951779330

 Time to unpack results and send to output file:         0.0161413444

 Time to free the MAP:         1.0012108577

 Time to free the data arrays:         0.0000021160

 Total Time:        1.5971992784

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003013569

 Time to allocate the data caches for the MAP:         0.0000336901

 Time to pack the data for transfer to MAP:         0.0000051115

 Time for MAP allocation:         0.4925617325

 Time for MAP call:         0.0949958557

 Time to unpack results and send to output file:         0.0025306016

 Time to free the MAP:         1.0149447487

 Time to free the data arrays:         0.0000023953

 Total Time:        1.6053754922

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002998887

 Time to allocate the data caches for the MAP:         0.0000344740

 Time to pack the data for transfer to MAP:         0.0000051492

 Time for MAP allocation:         0.4991942228

 Time for MAP call:         0.0954323236

 Time to unpack results and send to output file:         0.0027376490

 Time to free the MAP:         1.0144299909

 Time to free the data arrays:         0.0000018641

 Total Time:        1.6121355623

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003017834

 Time to allocate the data caches for the MAP:         0.0000319160

 Time to pack the data for transfer to MAP:         0.0000049702

 Time for MAP allocation:         0.4937328104

 Time for MAP call:         0.0950922787

 Time to unpack results and send to output file:         0.0018551982

 Time to free the MAP:         1.0156012893

 Time to free the data arrays:         0.0000023566

 Total Time:        1.6066226029

 

 Number of input samples: 128

 Time for disk access of input data:         0.0002977932

 Time to allocate the data caches for the MAP:         0.0000334515

 Time to pack the data for transfer to MAP:         0.0000049426

 Time for MAP allocation:         0.4978030927

 Time for MAP call:         0.0950974052

 Time to unpack results and send to output file:         0.0028037463

 Time to free the MAP:         1.0146649858

 Time to free the data arrays:         0.0000022298

 Total Time:        1.6107076470

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004244796

 Time to allocate the data caches for the MAP:         0.0000338414

 Time to pack the data for transfer to MAP:         0.0000060359

 Time for MAP allocation:         0.4858166232

 Time for MAP call:         0.0950949970

 Time to unpack results and send to output file:         0.0167356447

 Time to free the MAP:         1.0088858704

 Time to free the data arrays:         0.0000021073

 Total Time:        1.6069995995

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004131347

 Time to allocate the data caches for the MAP:         0.0000346553

 Time to pack the data for transfer to MAP:         0.0000063456

 Time for MAP allocation:         0.4954760229

 Time for MAP call:         0.0949554423

 Time to unpack results and send to output file:         0.0138312695

 Time to free the MAP:         1.0108893529

 Time to free the data arrays:         0.0000020408

 Total Time:        1.6156082640

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004253280

 Time to allocate the data caches for the MAP:         0.0000335563

 Time to pack the data for transfer to MAP:         0.0000062211

 Time for MAP allocation:         0.4906733693

 Time for MAP call:         0.0951950701

 Time to unpack results and send to output file:         0.0165371302

 Time to free the MAP:         1.0107958430

 Time to free the data arrays:         0.0000022143

 Total Time:        1.6136687324

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004129079

 Time to allocate the data caches for the MAP:         0.0000336069

 Time to pack the data for transfer to MAP:         0.0000063130

 Time for MAP allocation:         0.4989999978

 Time for MAP call:         0.0952198907

 Time to unpack results and send to output file:         0.0023884757

 Time to free the MAP:         1.0148649458

 Time to free the data arrays:         0.0000019529

 Total Time:        1.6119280908

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004177745

 Time to allocate the data caches for the MAP:         0.0000340540

 Time to pack the data for transfer to MAP:         0.0000066462

 Time for MAP allocation:         0.4886452479

 Time for MAP call:         0.0950145096

 Time to unpack results and send to output file:         0.0135241633

 Time to free the MAP:         1.0011337016

 Time to free the data arrays:         0.0000023102

 Total Time:        1.5987784074

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006533447

 Time to allocate the data caches for the MAP:         0.0000434905

 Time to pack the data for transfer to MAP:         0.0000085220

 Time for MAP allocation:         0.4890427511

 Time for MAP call:         0.0914726776

 Time to unpack results and send to output file:         0.0048607746

 Time to free the MAP:         1.0062361231

 Time to free the data arrays:         0.0000021310

 Total Time:        1.5923198147

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006528231

 Time to allocate the data caches for the MAP:         0.0000399327

 Time to pack the data for transfer to MAP:         0.0000092943

 Time for MAP allocation:         0.4825770243

 Time for MAP call:         0.0951307804

 Time to unpack results and send to output file:         0.0056286623

 Time to free the MAP:         1.0113015452

 Time to free the data arrays:         0.0000042628

 Total Time:        1.5953443252

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006539635

 Time to allocate the data caches for the MAP:         0.0000410390

 Time to pack the data for transfer to MAP:         0.0000086326

 Time for MAP allocation:         0.4913224951

 Time for MAP call:         0.0949316255

 Time to unpack results and send to output file:         0.0056889175

 Time to free the MAP:         1.0119041374

 Time to free the data arrays:         0.0000032899

 Total Time:        1.6045541007

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006458065

 Time to allocate the data caches for the MAP:         0.0000397554

 Time to pack the data for transfer to MAP:         0.0000089090

 Time for MAP allocation:         0.4926024167

 Time for MAP call:         0.0951798108

 Time to unpack results and send to output file:         0.0048544545

 Time to free the MAP:         1.0124053628

 Time to free the data arrays:         0.0000021964

 Total Time:        1.6057387123

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006523822

 Time to allocate the data caches for the MAP:         0.0000406365

 Time to pack the data for transfer to MAP:         0.0000090356

 Time for MAP allocation:         0.4910801760

 Time for MAP call:         0.0951519346

 Time to unpack results and send to output file:         0.0054811770

 Time to free the MAP:         1.0119044532

 Time to free the data arrays:         0.0000022626

 Total Time:        1.6043220577

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011212309

 Time to allocate the data caches for the MAP:         0.0000570017

 Time to pack the data for transfer to MAP:         0.0000139918

 Time for MAP allocation:         0.6359065762

 Time for MAP call:         0.0952067347

 Time to unpack results and send to output file:         0.0165988665

 Time to free the MAP:         1.0106597038

 Time to free the data arrays:         0.0000020116

 Total Time:        1.7595661171

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011463808

 Time to allocate the data caches for the MAP:         0.0000555291

 Time to pack the data for transfer to MAP:         0.0000136630

 Time for MAP allocation:         0.4867055749

 Time for MAP call:         0.0952105185

 Time to unpack results and send to output file:         0.0032900492

 Time to free the MAP:         1.0140356981

 Time to free the data arrays:         0.0000016858

 Total Time:        1.6004590994

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011154837

 Time to allocate the data caches for the MAP:         0.0000585118

 Time to pack the data for transfer to MAP:         0.0000137768

 Time for MAP allocation:         0.4921134751

 Time for MAP call:         0.0950548884

 Time to unpack results and send to output file:         0.0092253427

 Time to free the MAP:         1.0082600112

 Time to free the data arrays:         0.0000018590

 Total Time:        1.6058433487

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011170884

 Time to allocate the data caches for the MAP:         0.0000551513

 Time to pack the data for transfer to MAP:         0.0000137750

 Time for MAP allocation:         0.4879094135

 Time for MAP call:         0.0949501610

 Time to unpack results and send to output file:         0.0202723444

 Time to free the MAP:         1.0073240826

 Time to free the data arrays:         0.0000019175

 Total Time:        1.6116439336

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011068597

 Time to allocate the data caches for the MAP:         0.0000552847

 Time to pack the data for transfer to MAP:         0.0000138640

 Time for MAP allocation:         0.5764085765

 Time for MAP call:         0.0949944594

 Time to unpack results and send to output file:         0.0098643333

 Time to free the MAP:         1.0076945527

 Time to free the data arrays:         0.0000022188

 Total Time:        1.6901401491

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020527770

 Time to allocate the data caches for the MAP:         0.0000892272

 Time to pack the data for transfer to MAP:         0.0000287752

 Time for MAP allocation:         0.4832985990

 Time for MAP call:         0.0951920829

 Time to unpack results and send to output file:         0.0208565292

 Time to free the MAP:         1.0663587889

 Time to free the data arrays:         0.0000017909

 Total Time:        1.6678785703

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0021138568

 Time to allocate the data caches for the MAP:         0.0000884062

 Time to pack the data for transfer to MAP:         0.0000244330

 Time for MAP allocation:         0.4855435372

 Time for MAP call:         0.0951106539

 Time to unpack results and send to output file:         0.0091687728

 Time to free the MAP:         1.0082059426

 Time to free the data arrays:         0.0000021082

 Total Time:        1.6002577106

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020915875

 Time to allocate the data caches for the MAP:         0.0000845993

 Time to pack the data for transfer to MAP:         0.0000234352

 Time for MAP allocation:         0.4884558786

 Time for MAP call:         0.0952372001

 Time to unpack results and send to output file:         0.0078182798

 Time to free the MAP:         1.0094550825

 Time to free the data arrays:         0.0000020044

 Total Time:        1.6031680673

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020930152

 Time to allocate the data caches for the MAP:         0.0000859363

 Time to pack the data for transfer to MAP:         0.0000243905

 Time for MAP allocation:         0.4986125310

 Time for MAP call:         0.0953164692

 Time to unpack results and send to output file:         0.0063393970

 Time to free the MAP:         1.0108303112

 Time to free the data arrays:         0.0000018859

 Total Time:        1.6133039363

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0021226932

 Time to allocate the data caches for the MAP:         0.0000903484

 Time to pack the data for transfer to MAP:         0.0000248761

 Time for MAP allocation:         0.4957763988

 Time for MAP call:         0.0951768621

 Time to unpack results and send to output file:         0.0063786296

 Time to free the MAP:         1.0110774662

 Time to free the data arrays:         0.0000020342

 Total Time:        1.6106493086

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0040149223

 Time to allocate the data caches for the MAP:         0.0001493072

 Time to pack the data for transfer to MAP:         0.0000549377

 Time for MAP allocation:         0.4963169103

 Time for MAP call:         0.0952370172

 Time to unpack results and send to output file:         0.0232692861

 Time to free the MAP:         1.0141873056

 Time to free the data arrays:         0.0000024058

 Total Time:        1.6332320922

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039799651

 Time to allocate the data caches for the MAP:         0.0001485306

 Time to pack the data for transfer to MAP:         0.0000519473

 Time for MAP allocation:         0.4982861858

 Time for MAP call:         0.0950125082

 Time to unpack results and send to output file:         0.0212292871

 Time to free the MAP:         1.0165590823

 Time to free the data arrays:         0.0000025307

 Total Time:        1.6352700372

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0040229447

 Time to allocate the data caches for the MAP:         0.0001421454

 Time to pack the data for transfer to MAP:         0.0000457274

 Time for MAP allocation:         0.4932331725

 Time for MAP call:         0.0950598260

 Time to unpack results and send to output file:         0.0118861206

 Time to free the MAP:         1.0058672677

 Time to free the data arrays:         0.0000025970

 Total Time:        1.6102598013

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039760079

 Time to allocate the data caches for the MAP:         0.0001509366

 Time to pack the data for transfer to MAP:         0.0000467370

 Time for MAP allocation:         0.4996828724

 Time for MAP call:         0.0952219761

 Time to unpack results and send to output file:         0.0121934533

 Time to free the MAP:         1.0153092525

 Time to free the data arrays:         0.0000023187

 Total Time:        1.6265835546

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039543109

 Time to allocate the data caches for the MAP:         0.0001551741

 Time to pack the data for transfer to MAP:         0.0000495040

 Time for MAP allocation:         0.4912004447

 Time for MAP call:         0.0955276084

 Time to unpack results and send to output file:         0.0122685910

 Time to free the MAP:         1.0150248298

 Time to free the data arrays:         0.0000026907

 Total Time:        1.6181831536

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0076523791

 Time to allocate the data caches for the MAP:         0.0002843328

 Time to pack the data for transfer to MAP:         0.0001158522

 Time for MAP allocation:         0.4975359493

 Time for MAP call:         0.0958523829

 Time to unpack results and send to output file:         0.0664977788

 Time to free the MAP:         1.0704445222

 Time to free the data arrays:         0.0000024651

 Total Time:        1.7383856625

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077386862

 Time to allocate the data caches for the MAP:         0.0002731903

 Time to pack the data for transfer to MAP:         0.0001071265

 Time for MAP allocation:         0.5258789176

 Time for MAP call:         0.0961381819

 Time to unpack results and send to output file:         0.0294885012

 Time to free the MAP:         1.0071438624

 Time to free the data arrays:         0.0000021250

 Total Time:        1.6667705911

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077019869

 Time to allocate the data caches for the MAP:         0.0002805534

 Time to pack the data for transfer to MAP:         0.0001192709

 Time for MAP allocation:         0.4962619981

 Time for MAP call:         0.0979178165

 Time to unpack results and send to output file:         0.0239123542

 Time to free the MAP:         1.0209921206

 Time to free the data arrays:         0.0000020261

 Total Time:        1.6471881267

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077521941

 Time to allocate the data caches for the MAP:         0.0002879136

 Time to pack the data for transfer to MAP:         0.0001230346

 Time for MAP allocation:         0.4950839878

 Time for MAP call:         0.0959864881

 Time to unpack results and send to output file:         0.0240275887

 Time to free the MAP:         1.0127631976

 Time to free the data arrays:         0.0000025285

 Total Time:        1.6360269330

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0076898881

 Time to allocate the data caches for the MAP:         0.0002780512

 Time to pack the data for transfer to MAP:         0.0001132615

 Time for MAP allocation:         0.4909886794

 Time for MAP call:         0.0958746880

 Time to unpack results and send to output file:         0.0239671468

 Time to free the MAP:         1.0129617603

 Time to free the data arrays:         0.0000025336

 Total Time:        1.6318760091

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0152687589

 Time to allocate the data caches for the MAP:         0.0006450696

 Time to pack the data for transfer to MAP:         0.0003710796

 Time for MAP allocation:         0.4994761662

 Time for MAP call:         0.0965612114

 Time to unpack results and send to output file:         0.0818464218

 Time to free the MAP:         1.0143682245

 Time to free the data arrays:         0.0001803142

 Total Time:        1.7087172463

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155155589

 Time to allocate the data caches for the MAP:         0.0005569691

 Time to pack the data for transfer to MAP:         0.0003504222

 Time for MAP allocation:         0.4991092755

 Time for MAP call:         0.0964289327

 Time to unpack results and send to output file:         0.0583232576

 Time to free the MAP:         1.0080195825

 Time to free the data arrays:         0.0001665093

 Total Time:        1.6784705078

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155311050

 Time to allocate the data caches for the MAP:         0.0005837614

 Time to pack the data for transfer to MAP:         0.0003902114

 Time for MAP allocation:         0.4953729869

 Time for MAP call:         0.0961229276

 Time to unpack results and send to output file:         0.0564903227

 Time to free the MAP:         1.0101273710

 Time to free the data arrays:         0.0002033362

 Total Time:        1.6748220223

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155967921

 Time to allocate the data caches for the MAP:         0.0005677287

 Time to pack the data for transfer to MAP:         0.0003370613

 Time for MAP allocation:         0.4915687337

 Time for MAP call:         0.0961724815

 Time to unpack results and send to output file:         0.0572948197

 Time to free the MAP:         1.0090745642

 Time to free the data arrays:         0.0001635495

 Total Time:        1.6707757307

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0153888972

 Time to allocate the data caches for the MAP:         0.0005544521

 Time to pack the data for transfer to MAP:         0.0003298117

 Time for MAP allocation:         0.4979025208

 Time for MAP call:         0.0964755721

 Time to unpack results and send to output file:         0.0477914239

 Time to free the MAP:         1.0184813200

 Time to free the data arrays:         0.0001077971

 Total Time:        1.6770317949

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0309641128

 Time to allocate the data caches for the MAP:         0.0013734816

 Time to pack the data for transfer to MAP:         0.0010195054

 Time for MAP allocation:         0.4866515320

 Time for MAP call:         0.0985743364

 Time to unpack results and send to output file:         0.0951500578

 Time to free the MAP:         1.0183556145

 Time to free the data arrays:         0.0002332899

 Total Time:        1.7323219304

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0308205453

 Time to allocate the data caches for the MAP:         0.0013397045

 Time to pack the data for transfer to MAP:         0.0010253805

 Time for MAP allocation:         0.4942862611

 Time for MAP call:         0.0975307145

 Time to unpack results and send to output file:         0.1024909756

 Time to free the MAP:         1.0024817060

 Time to free the data arrays:         0.0002428833

 Total Time:        1.7302181708

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0308872289

 Time to allocate the data caches for the MAP:         0.0013542913

 Time to pack the data for transfer to MAP:         0.0010441737

 Time for MAP allocation:         0.5041469932

 Time for MAP call:         0.0973496902

 Time to unpack results and send to output file:         0.1321786757

 Time to free the MAP:         1.0130066078

 Time to free the data arrays:         0.0002405116

 Total Time:        1.7802081724

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0309590017

 Time to allocate the data caches for the MAP:         0.0013491265

 Time to pack the data for transfer to MAP:         0.0010349776

 Time for MAP allocation:         0.4887624666

 Time for MAP call:         0.0975445812

 Time to unpack results and send to output file:         0.1257834604

 Time to free the MAP:         1.0091950650

 Time to free the data arrays:         0.0002260625

 Total Time:        1.7548547414

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0305184396

 Time to allocate the data caches for the MAP:         0.0013554525

 Time to pack the data for transfer to MAP:         0.0010226661

 Time for MAP allocation:         0.4922587475

 Time for MAP call:         0.0976726624

 Time to unpack results and send to output file:         0.2081431989

 Time to free the MAP:         1.0067198801

 Time to free the data arrays:         0.0002334263

 Total Time:        1.8379244733

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0609330097

 Time to allocate the data caches for the MAP:         0.0029523078

 Time to pack the data for transfer to MAP:         0.0023032164

 Time for MAP allocation:         0.4837902127

 Time for MAP call:         0.0997763753

 Time to unpack results and send to output file:         0.2704980745

 Time to free the MAP:         1.0722518450

 Time to free the data arrays:         0.0003667333

 Total Time:        1.9928717747

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0617976347

 Time to allocate the data caches for the MAP:         0.0028911005

 Time to pack the data for transfer to MAP:         0.0023119589

 Time for MAP allocation:         0.4965793097

 Time for MAP call:         0.0997581009

 Time to unpack results and send to output file:         0.2717599156

 Time to free the MAP:         1.0810782032

 Time to free the data arrays:         0.0003660037

 Total Time:        2.0165422272

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0610974608

 Time to allocate the data caches for the MAP:         0.0028881880

 Time to pack the data for transfer to MAP:         0.0023311893

 Time for MAP allocation:         0.4972199808

 Time for MAP call:         0.0997986157

 Time to unpack results and send to output file:         0.2523327966

 Time to free the MAP:         1.0202008470

 Time to free the data arrays:         0.0003725177

 Total Time:        1.9362415959

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0618499396

 Time to allocate the data caches for the MAP:         0.0028918607

 Time to pack the data for transfer to MAP:         0.0023259384

 Time for MAP allocation:         0.4969536377

 Time for MAP call:         0.0998055221

 Time to unpack results and send to output file:         0.3368583421

 Time to free the MAP:         1.0058137001

 Time to free the data arrays:         0.0004099412

 Total Time:        2.0069088821

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0617749076

 Time to allocate the data caches for the MAP:         0.0029494664

 Time to pack the data for transfer to MAP:         0.0022897833

 Time for MAP allocation:         0.5889931580

 Time for MAP call:         0.0997460486

 Time to unpack results and send to output file:         0.2293532444

 Time to free the MAP:         1.1137115346

 Time to free the data arrays:         0.0003592072

 Total Time:        2.0991773501

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1223233812

 Time to allocate the data caches for the MAP:         0.0060487357

 Time to pack the data for transfer to MAP:         0.0046404823

 Time for MAP allocation:         0.4967504833

 Time for MAP call:         0.1046356604

 Time to unpack results and send to output file:         0.6042715801

 Time to free the MAP:         1.0139117451

 Time to free the data arrays:         0.0006294582

 Total Time:        2.3532115264

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1234943625

 Time to allocate the data caches for the MAP:         0.0060945024

 Time to pack the data for transfer to MAP:         0.0046393281

 Time for MAP allocation:         0.4906869127

 Time for MAP call:         0.1044343558

 Time to unpack results and send to output file:         0.5475239842

 Time to free the MAP:         1.0008086898

 Time to free the data arrays:         0.0006272985

 Total Time:        2.2783094340

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1235368187

 Time to allocate the data caches for the MAP:         0.0060129187

 Time to pack the data for transfer to MAP:         0.0046166513

 Time for MAP allocation:         0.6473608577

 Time for MAP call:         0.1045057125

 Time to unpack results and send to output file:         0.6520331745

 Time to free the MAP:         1.0062930053

 Time to free the data arrays:         0.0006307903

 Total Time:        2.5449899291

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1226866310

 Time to allocate the data caches for the MAP:         0.0060982890

 Time to pack the data for transfer to MAP:         0.0046306234

 Time for MAP allocation:         0.4975843105

 Time for MAP call:         0.1044061300

 Time to unpack results and send to output file:         0.7373706068

 Time to free the MAP:         1.0110043235

 Time to free the data arrays:         0.0006276824

 Total Time:        2.4844085967

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1236492754

 Time to allocate the data caches for the MAP:         0.0061232167

 Time to pack the data for transfer to MAP:         0.0046962629

 Time for MAP allocation:         0.4973512459

 Time for MAP call:         0.1047289211

 Time to unpack results and send to output file:         0.5984523876

 Time to free the MAP:         1.0096239571

 Time to free the data arrays:         0.0006239613

 Total Time:        2.3452492280

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2433147631

 Time to allocate the data caches for the MAP:         0.0124351159

 Time to pack the data for transfer to MAP:         0.0093538002

 Time for MAP allocation:         0.4826926149

 Time for MAP call:         0.1138360584

 Time to unpack results and send to output file:         1.2078320232

 Time to free the MAP:         1.0112141732

 Time to free the data arrays:         0.0011754382

 Total Time:        3.0818539871

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2471576333

 Time to allocate the data caches for the MAP:         0.0122104479

 Time to pack the data for transfer to MAP:         0.0093201792

 Time for MAP allocation:         0.4990022815

 Time for MAP call:         0.1134742349

 Time to unpack results and send to output file:         1.2750375099

 Time to free the MAP:         1.0240164598

 Time to free the data arrays:         0.0012340176

 Total Time:        3.1814527641

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2440352384

 Time to allocate the data caches for the MAP:         0.0123008805

 Time to pack the data for transfer to MAP:         0.0093677483

 Time for MAP allocation:         0.5268104530

 Time for MAP call:         0.1135781310

 Time to unpack results and send to output file:         1.1765954776

 Time to free the MAP:         1.0723911747

 Time to free the data arrays:         0.0011465788

 Total Time:        3.1562256823

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2468833220

 Time to allocate the data caches for the MAP:         0.0123088931

 Time to pack the data for transfer to MAP:         0.0092618705

 Time for MAP allocation:         0.4839026829

 Time for MAP call:         0.1137077660

 Time to unpack results and send to output file:         1.2198169604

 Time to free the MAP:         1.0388967617

 Time to free the data arrays:         0.0011486268

 Total Time:        3.1259268833

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2459241305

 Time to allocate the data caches for the MAP:         0.0122457874

 Time to pack the data for transfer to MAP:         0.0093518647

 Time for MAP allocation:         0.4810066332

 Time for MAP call:         0.1135702695

 Time to unpack results and send to output file:         1.3701336046

 Time to free the MAP:         1.1387859347

 Time to free the data arrays:         0.0011462700

 Total Time:        3.3721644945

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4669249374

 Time to allocate the data caches for the MAP:         0.0236148515

 Time to pack the data for transfer to MAP:         0.0176867930

 Time for MAP allocation:         0.4846340159

 Time for MAP call:         0.1304322474

 Time to unpack results and send to output file:         2.2143241336

 Time to free the MAP:         1.0178088160

 Time to free the data arrays:         0.0022901609

 Total Time:        4.3577159558

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4689777396

 Time to allocate the data caches for the MAP:         0.0236062051

 Time to pack the data for transfer to MAP:         0.0177786003

 Time for MAP allocation:         0.4822210636

 Time for MAP call:         0.1305544712

 Time to unpack results and send to output file:         2.5779657812

 Time to free the MAP:         1.0539508166

 Time to free the data arrays:         0.0022598098

 Total Time:        4.7573144874

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4685206003

 Time to allocate the data caches for the MAP:         0.0234845260

 Time to pack the data for transfer to MAP:         0.0177392430

 Time for MAP allocation:         0.4811893543

 Time for MAP call:         0.1305410591

 Time to unpack results and send to output file:         2.7318313033

 Time to free the MAP:         1.0901142346

 Time to free the data arrays:         0.0023433983

 Total Time:        4.9457637189

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4662178876

 Time to allocate the data caches for the MAP:         0.0274593731

 Time to pack the data for transfer to MAP:         0.0193949281

 Time for MAP allocation:         0.4972668522

 Time for MAP call:         0.1320532151

 Time to unpack results and send to output file:         2.2880233624

 Time to free the MAP:         1.0124280229

 Time to free the data arrays:         0.0022550029

 Total Time:        4.4450986442

 

 Number of input samples: 500000

 Time for disk access of input data:         0.4662777954

 Time to allocate the data caches for the MAP:         0.0237238959

 Time to pack the data for transfer to MAP:         0.0180998071

 Time for MAP allocation:         0.4943604413

 Time for MAP call:         0.1304048951

 Time to unpack results and send to output file:         2.2359694230

 Time to free the MAP:         1.0061245604

 Time to free the data arrays:         0.0022827988

 Total Time:        4.3772436168

 

e.   SRC-6E C program data (8 Bins)

Time to complete 32 samples: 0.2500 seconds.

Time to complete 32 samples: 0.2500 seconds.

Time to complete 32 samples: 0.2400 seconds.

Time to complete 32 samples: 0.2400 seconds.

Time to complete 32 samples: 0.2500 seconds.

 

Time to complete 64 samples: 0.2400 seconds.

Time to complete 64 samples: 0.2500 seconds.

Time to complete 64 samples: 0.2500 seconds.

Time to complete 64 samples: 0.2500 seconds.

Time to complete 64 samples: 0.2500 seconds.

 

Time to complete 128 samples: 0.2500 seconds.

Time to complete 128 samples: 0.2500 seconds.

Time to complete 128 samples: 0.2500 seconds.

Time to complete 128 samples: 0.2400 seconds.

Time to complete 128 samples: 0.2500 seconds.

 

Time to complete 256 samples: 0.2500 seconds.

Time to complete 256 samples: 0.2500 seconds.

Time to complete 256 samples: 0.2500 seconds.

Time to complete 256 samples: 0.2500 seconds.

Time to complete 256 samples: 0.2500 seconds.

 

Time to complete 512 samples: 0.2400 seconds.

Time to complete 512 samples: 0.2500 seconds.

Time to complete 512 samples: 0.2500 seconds.

Time to complete 512 samples: 0.2500 seconds.

Time to complete 512 samples: 0.2500 seconds.

 

Time to complete 1024 samples: 0.2500 seconds.

Time to complete 1024 samples: 0.2500 seconds.

Time to complete 1024 samples: 0.2500 seconds.

Time to complete 1024 samples: 0.2500 seconds.

Time to complete 1024 samples: 0.2500 seconds.

 

Time to complete 2048 samples: 0.2500 seconds.

Time to complete 2048 samples: 0.2600 seconds.

Time to complete 2048 samples: 0.2600 seconds.

Time to complete 2048 samples: 0.2600 seconds.

Time to complete 2048 samples: 0.2600 seconds.

 

Time to complete 4096 samples: 0.2700 seconds.

Time to complete 4096 samples: 0.2800 seconds.

Time to complete 4096 samples: 0.2700 seconds.

Time to complete 4096 samples: 0.2600 seconds.

Time to complete 4096 samples: 0.2700 seconds.

 

Time to complete 8192 samples: 0.3000 seconds.

Time to complete 8192 samples: 0.2900 seconds.

Time to complete 8192 samples: 0.2900 seconds.

Time to complete 8192 samples: 0.3000 seconds.

Time to complete 8192 samples: 0.2800 seconds.

 

Time to complete 16384 samples: 0.3400 seconds.

Time to complete 16384 samples: 0.3400 seconds.

Time to complete 16384 samples: 0.3300 seconds.

Time to complete 16384 samples: 0.3400 seconds.

Time to complete 16384 samples: 0.3300 seconds.

 

Time to complete 32768 samples: 0.4100 seconds.

Time to complete 32768 samples: 0.4200 seconds.

Time to complete 32768 samples: 0.4000 seconds.

Time to complete 32768 samples: 0.4400 seconds.

Time to complete 32768 samples: 0.3900 seconds.

 

Time to complete 65536 samples: 0.5600 seconds.

Time to complete 65536 samples: 0.5600 seconds.

Time to complete 65536 samples: 0.5600 seconds.

Time to complete 65536 samples: 0.5700 seconds.

Time to complete 65536 samples: 0.6000 seconds.

 

Time to complete 131072 samples: 0.9200 seconds.

Time to complete 131072 samples: 0.8900 seconds.

Time to complete 131072 samples: 0.8900 seconds.

Time to complete 131072 samples: 0.8500 seconds.

Time to complete 131072 samples: 0.9500 seconds.

 

Time to complete 262144 samples: 1.5100 seconds.

Time to complete 262144 samples: 1.5000 seconds.

Time to complete 262144 samples: 1.5400 seconds.

Time to complete 262144 samples: 1.5300 seconds.

Time to complete 262144 samples: 1.5200 seconds.

 

Time to complete 500000 samples: 2.6500 seconds.

Time to complete 500000 samples: 2.6400 seconds.

Time to complete 500000 samples: 2.6900 seconds.

Time to complete 500000 samples: 2.6500 seconds.

Time to complete 500000 samples: 2.5600 seconds.

 

f.   Windows C program data (8 bins)

Time to complete 32 samples: 0.1090 seconds.

Time to complete 32 samples: 0.1090 seconds.

Time to complete 32 samples: 0.1090 seconds.

Time to complete 32 samples: 0.0930 seconds.

Time to complete 32 samples: 0.1090 seconds.

 

Time to complete 64 samples: 0.0780 seconds.

Time to complete 64 samples: 0.0930 seconds.

Time to complete 64 samples: 0.0930 seconds.

Time to complete 64 samples: 0.1090 seconds.

Time to complete 64 samples: 0.1090 seconds.

 

Time to complete 128 samples: 0.1090 seconds.

Time to complete 128 samples: 0.1090 seconds.

Time to complete 128 samples: 0.0930 seconds.

Time to complete 128 samples: 0.0930 seconds.

Time to complete 128 samples: 0.0930 seconds.

 

Time to complete 256 samples: 0.1090 seconds.

Time to complete 256 samples: 0.1090 seconds.

Time to complete 256 samples: 0.1240 seconds.

Time to complete 256 samples: 0.1240 seconds.

Time to complete 256 samples: 0.1090 seconds.

 

Time to complete 512 samples: 0.1240 seconds.

Time to complete 512 samples: 0.1240 seconds.

Time to complete 512 samples: 0.1240 seconds.

Time to complete 512 samples: 0.1090 seconds.

Time to complete 512 samples: 0.1090 seconds.

 

Time to complete 1024 samples: 0.1240 seconds.

Time to complete 1024 samples: 0.1240 seconds.

Time to complete 1024 samples: 0.1240 seconds.

Time to complete 1024 samples: 0.1240 seconds.

Time to complete 1024 samples: 0.1240 seconds.

 

Time to complete 2048 samples: 0.1240 seconds.

Time to complete 2048 samples: 0.1240 seconds.

Time to complete 2048 samples: 0.1240 seconds.

Time to complete 2048 samples: 0.1400 seconds.

Time to complete 2048 samples: 0.1240 seconds.

 

Time to complete 4096 samples: 0.1400 seconds.

Time to complete 4096 samples: 0.1400 seconds.

Time to complete 4096 samples: 0.1400 seconds.

Time to complete 4096 samples: 0.1400 seconds.

Time to complete 4096 samples: 0.1400 seconds.

 

Time to complete 8192 samples: 0.1710 seconds.

Time to complete 8192 samples: 0.1560 seconds.

Time to complete 8192 samples: 0.1560 seconds.

Time to complete 8192 samples: 0.1710 seconds.

Time to complete 8192 samples: 0.1560 seconds.

 

Time to complete 16384 samples: 0.2180 seconds.

Time to complete 16384 samples: 0.2180 seconds.

Time to complete 16384 samples: 0.2030 seconds.

Time to complete 16384 samples: 0.2180 seconds.

Time to complete 16384 samples: 0.2180 seconds.

 

Time to complete 32768 samples: 0.2810 seconds.

Time to complete 32768 samples: 0.2960 seconds.

Time to complete 32768 samples: 0.2650 seconds.

Time to complete 32768 samples: 0.2810 seconds.

Time to complete 32768 samples: 0.2810 seconds.

 

Time to complete 65536 samples: 0.4060 seconds.

Time to complete 65536 samples: 0.4210 seconds.

Time to complete 65536 samples: 0.4060 seconds.

Time to complete 65536 samples: 0.4060 seconds.

Time to complete 65536 samples: 0.4210 seconds.

 

Time to complete 131072 samples: 0.6870 seconds.

Time to complete 131072 samples: 0.6870 seconds.

Time to complete 131072 samples: 0.6710 seconds.

Time to complete 131072 samples: 0.6870 seconds.

Time to complete 131072 samples: 0.6870 seconds.

 

Time to complete 262144 samples: 1.2340 seconds.

Time to complete 262144 samples: 1.1710 seconds.

Time to complete 262144 samples: 1.2490 seconds.

Time to complete 262144 samples: 1.2490 seconds.

Time to complete 262144 samples: 1.2490 seconds.

 

Time to complete 500000 samples: 2.9210 seconds.

Time to complete 500000 samples: 3.1870 seconds.

Time to complete 500000 samples: 2.8590 seconds.

Time to complete 500000 samples: 2.7180 seconds.

Time to complete 500000 samples: 2.7490 seconds.

 

g.   SRC-6E Macro data (16 bins)

 Number of input samples: 32

 Time for disk access of input data:         0.0002494454

 Time to allocate the data caches for the MAP:         0.0000329728

 Time to pack the data for transfer to MAP:         0.0000070252

 Time for MAP allocation:         0.4917390322

 Time for MAP call:         0.0955580074

 Time to unpack results and send to output file:         0.0004856407

 Time to free the MAP:         1.0067343126

 Time to free the data arrays:         0.0000028054

 Total Time:        1.5948092417

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002376856

 Time to allocate the data caches for the MAP:         0.0000331528

 Time to pack the data for transfer to MAP:         0.0000077724

 Time for MAP allocation:         0.7000579955

 Time for MAP call:         0.0956669219

 Time to unpack results and send to output file:         0.0006287653

 Time to free the MAP:         1.0064827937

 Time to free the data arrays:         0.0000021596

 Total Time:        1.8031172470

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002421313

 Time to allocate the data caches for the MAP:         0.0000392819

 Time to pack the data for transfer to MAP:         0.0000096789

 Time for MAP allocation:         0.5238700521

 Time for MAP call:         0.0960635992

 Time to unpack results and send to output file:         0.0004874128

 Time to free the MAP:         1.0058908925

 Time to free the data arrays:         0.0000024881

 Total Time:        1.6266055367

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002493197

 Time to allocate the data caches for the MAP:         0.0000386313

 Time to pack the data for transfer to MAP:         0.0000104376

 Time for MAP allocation:         0.5241761836

 Time for MAP call:         0.0957889429

 Time to unpack results and send to output file:         0.0004987084

 Time to free the MAP:         1.0061023581

 Time to free the data arrays:         0.0000018561

 Total Time:        1.6268664376

 

 Number of input samples: 32

 Time for disk access of input data:         0.0002620011

 Time to allocate the data caches for the MAP:         0.0000378779

 Time to pack the data for transfer to MAP:         0.0000083084

 Time for MAP allocation:         0.5104885625

 Time for MAP call:         0.0962848746

 Time to unpack results and send to output file:         0.0004780956

 Time to free the MAP:         1.0060011423

 Time to free the data arrays:         0.0000019420

 Total Time:        1.6135628044

 

 Number of input samples: 64

 Time for disk access of input data:         0.0004705861

 Time to allocate the data caches for the MAP:         0.0000518820

 Time to pack the data for transfer to MAP:         0.0000088150

 Time for MAP allocation:         0.5387593686

 Time for MAP call:         0.0949136632

 Time to unpack results and send to output file:         0.0005386311

 Time to free the MAP:         1.0073206390

 Time to free the data arrays:         0.0000019707

 Total Time:        1.6420655559

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002669827

 Time to allocate the data caches for the MAP:         0.0000342468

 Time to pack the data for transfer to MAP:         0.0000069469

 Time for MAP allocation:         0.4935359962

 Time for MAP call:         0.0954422834

 Time to unpack results and send to output file:         0.0005202463

 Time to free the MAP:         1.0065762330

 Time to free the data arrays:         0.0000021656

 Total Time:        1.5963851011

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002732552

 Time to allocate the data caches for the MAP:         0.0000342822

 Time to pack the data for transfer to MAP:         0.0000075165

 Time for MAP allocation:         0.5177181343

 Time for MAP call:         0.0953980757

 Time to unpack results and send to output file:         0.0005372717

 Time to free the MAP:         1.0068338012

 Time to free the data arrays:         0.0000019639

 Total Time:        1.6208043007

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002657180

 Time to allocate the data caches for the MAP:         0.0000340817

 Time to pack the data for transfer to MAP:         0.0000069658

 Time for MAP allocation:         0.5058222936

 Time for MAP call:         0.0953017842

 Time to unpack results and send to output file:         0.0005384575

 Time to free the MAP:         1.0066822017

 Time to free the data arrays:         0.0000024247

 Total Time:        1.6086539270

 

 Number of input samples: 64

 Time for disk access of input data:         0.0002647685

 Time to allocate the data caches for the MAP:         0.0000362354

 Time to pack the data for transfer to MAP:         0.0000072889

 Time for MAP allocation:         0.5307310945

 Time for MAP call:         0.0952485127

 Time to unpack results and send to output file:         0.0005219056

 Time to free the MAP:         1.0070499027

 Time to free the data arrays:         0.0000031020

 Total Time:        1.6338628103

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003175172

 Time to allocate the data caches for the MAP:         0.0000333685

 Time to pack the data for transfer to MAP:         0.0000074423

 Time for MAP allocation:         0.4912659664

 Time for MAP call:         0.0955074857

 Time to unpack results and send to output file:         0.0062277175

 Time to free the MAP:         1.0109419105

 Time to free the data arrays:         0.0000024852

 Total Time:        1.6043038933

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003245850

 Time to allocate the data caches for the MAP:         0.0000341684

 Time to pack the data for transfer to MAP:         0.0000075255

 Time for MAP allocation:         0.5068336923

 Time for MAP call:         0.0951714737

 Time to unpack results and send to output file:         0.0064855953

 Time to free the MAP:         1.0010738203

 Time to free the data arrays:         0.0000024386

 Total Time:        1.6099332991

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003219494

 Time to allocate the data caches for the MAP:         0.0000327169

 Time to pack the data for transfer to MAP:         0.0000070803

 Time for MAP allocation:         0.4944968467

 Time for MAP call:         0.0952637801

 Time to unpack results and send to output file:         0.0062889122

 Time to free the MAP:         1.0113423865

 Time to free the data arrays:         0.0000029213

 Total Time:        1.6077565934

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003200588

 Time to allocate the data caches for the MAP:         0.0000325638

 Time to pack the data for transfer to MAP:         0.0000075085

 Time for MAP allocation:         0.4942430896

 Time for MAP call:         0.0950151188

 Time to unpack results and send to output file:         0.0007793874

 Time to free the MAP:         1.0170055416

 Time to free the data arrays:         0.0000024516

 Total Time:        1.6074057200

 

 Number of input samples: 128

 Time for disk access of input data:         0.0003188197

 Time to allocate the data caches for the MAP:         0.0000324468

 Time to pack the data for transfer to MAP:         0.0000071337

 Time for MAP allocation:         0.4930965546

 Time for MAP call:         0.0951357246

 Time to unpack results and send to output file:         0.0007780018

 Time to free the MAP:         1.0169114446

 Time to free the data arrays:         0.0000028074

 Total Time:        1.6062829333

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004375125

 Time to allocate the data caches for the MAP:         0.0000323293

 Time to pack the data for transfer to MAP:         0.0000081040

 Time for MAP allocation:         0.4963378958

 Time for MAP call:         0.0952767864

 Time to unpack results and send to output file:         0.0188087320

 Time to free the MAP:         1.0086655015

 Time to free the data arrays:         0.0000023051

 Total Time:        1.6195691667

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004314971

 Time to allocate the data caches for the MAP:         0.0000343948

 Time to pack the data for transfer to MAP:         0.0000086624

 Time for MAP allocation:         0.4991619605

 Time for MAP call:         0.0948748293

 Time to unpack results and send to output file:         0.0033565193

 Time to free the MAP:         1.0141901136

 Time to free the data arrays:         0.0000025719

 Total Time:        1.6120605489

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004337225

 Time to allocate the data caches for the MAP:         0.0000324250

 Time to pack the data for transfer to MAP:         0.0000085320

 Time for MAP allocation:         0.4995839257

 Time for MAP call:         0.0952489340

 Time to unpack results and send to output file:         0.0039620954

 Time to free the MAP:         1.0133286984

 Time to free the data arrays:         0.0000026223

 Total Time:        1.6126009554

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004403372

 Time to allocate the data caches for the MAP:         0.0000334387

 Time to pack the data for transfer to MAP:         0.0000087049

 Time for MAP allocation:         0.4963152628

 Time for MAP call:         0.0955041989

 Time to unpack results and send to output file:         0.0037934351

 Time to free the MAP:         1.0135066481

 Time to free the data arrays:         0.0000024634

 Total Time:        1.6096044891

 

 Number of input samples: 256

 Time for disk access of input data:         0.0004305313

 Time to allocate the data caches for the MAP:         0.0000339717

 Time to pack the data for transfer to MAP:         0.0000097118

 Time for MAP allocation:         0.5000635034

 Time for MAP call:         0.0955384287

 Time to unpack results and send to output file:         0.0038005257

 Time to free the MAP:         1.0134846717

 Time to free the data arrays:         0.0000026747

 Total Time:        1.6133640189

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006734235

 Time to allocate the data caches for the MAP:         0.0000418255

 Time to pack the data for transfer to MAP:         0.0000113630

 Time for MAP allocation:         0.4950527823

 Time for MAP call:         0.0952348387

 Time to unpack results and send to output file:         0.0049354217

 Time to free the MAP:         1.0726101894

 Time to free the data arrays:         0.0000033395

 Total Time:        1.6685631835

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006698351

 Time to allocate the data caches for the MAP:         0.0000420200

 Time to pack the data for transfer to MAP:         0.0000113344

 Time for MAP allocation:         0.4982129639

 Time for MAP call:         0.0956647768

 Time to unpack results and send to output file:         0.0062657378

 Time to free the MAP:         1.0108674467

 Time to free the data arrays:         0.0000023693

 Total Time:        1.6117364840

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006686286

 Time to allocate the data caches for the MAP:         0.0000417138

 Time to pack the data for transfer to MAP:         0.0000110783

 Time for MAP allocation:         0.4951755952

 Time for MAP call:         0.0951356172

 Time to unpack results and send to output file:         0.0185935818

 Time to free the MAP:         1.0090613072

 Time to free the data arrays:         0.0000028083

 Total Time:        1.6186903305

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006713350

 Time to allocate the data caches for the MAP:         0.0000434133

 Time to pack the data for transfer to MAP:         0.0000109301

 Time for MAP allocation:         0.4973034780

 Time for MAP call:         0.0950696563

 Time to unpack results and send to output file:         0.0098869084

 Time to free the MAP:         1.0078418475

 Time to free the data arrays:         0.0000026451

 Total Time:        1.6108302138

 

 Number of input samples: 512

 Time for disk access of input data:         0.0006789742

 Time to allocate the data caches for the MAP:         0.0000420203

 Time to pack the data for transfer to MAP:         0.0000110436

 Time for MAP allocation:         0.4998200440

 Time for MAP call:         0.0954721513

 Time to unpack results and send to output file:         0.0063456992

 Time to free the MAP:         1.0109102945

 Time to free the data arrays:         0.0000023882

 Total Time:        1.6132826152

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011444539

 Time to allocate the data caches for the MAP:         0.0000596112

 Time to pack the data for transfer to MAP:         0.0000164695

 Time for MAP allocation:         0.4911086229

 Time for MAP call:         0.0952958067

 Time to unpack results and send to output file:         0.0165664535

 Time to free the MAP:         1.0109393258

 Time to free the data arrays:         0.0000018988

 Total Time:        1.6151326423

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011455948

 Time to allocate the data caches for the MAP:         0.0000557348

 Time to pack the data for transfer to MAP:         0.0000164897

 Time for MAP allocation:         0.4904046665

 Time for MAP call:         0.0953486459

 Time to unpack results and send to output file:         0.0059919642

 Time to free the MAP:         1.0114302341

 Time to free the data arrays:         0.0000019532

 Total Time:        1.6043952832

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011422355

 Time to allocate the data caches for the MAP:         0.0000562123

 Time to pack the data for transfer to MAP:         0.0000160819

 Time for MAP allocation:         0.4998226487

 Time for MAP call:         0.0951646476

 Time to unpack results and send to output file:         0.0165943177

 Time to free the MAP:         1.0110234869

 Time to free the data arrays:         0.0000021381

 Total Time:        1.6238217688

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011469261

 Time to allocate the data caches for the MAP:         0.0000561631

 Time to pack the data for transfer to MAP:         0.0000161107

 Time for MAP allocation:         0.4922774827

 Time for MAP call:         0.0953687688

 Time to unpack results and send to output file:         0.0058357638

 Time to free the MAP:         1.0115965329

 Time to free the data arrays:         0.0000018068

 Total Time:        1.6062995549

 

 Number of input samples: 1024

 Time for disk access of input data:         0.0011621169

 Time to allocate the data caches for the MAP:         0.0000553520

 Time to pack the data for transfer to MAP:         0.0000164639

 Time for MAP allocation:         0.4966354974

 Time for MAP call:         0.0952146035

 Time to unpack results and send to output file:         0.0057549878

 Time to free the MAP:         1.0118436530

 Time to free the data arrays:         0.0000026619

 Total Time:        1.6106853364

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020792168

 Time to allocate the data caches for the MAP:         0.0000879621

 Time to pack the data for transfer to MAP:         0.0000271542

 Time for MAP allocation:         0.4951365525

 Time for MAP call:         0.0951699536

 Time to unpack results and send to output file:         0.0061352334

 Time to free the MAP:         1.0014804270

 Time to free the data arrays:         0.0000025403

 Total Time:        1.6001190399

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020760554

 Time to allocate the data caches for the MAP:         0.0000888105

 Time to pack the data for transfer to MAP:         0.0000258818

 Time for MAP allocation:         0.4995487465

 Time for MAP call:         0.0952971898

 Time to unpack results and send to output file:         0.0103976211

 Time to free the MAP:         1.0071163052

 Time to free the data arrays:         0.0000020304

 Total Time:        1.6145526408

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0021078000

 Time to allocate the data caches for the MAP:         0.0000894050

 Time to pack the data for transfer to MAP:         0.0000267282

 Time for MAP allocation:         0.4993222510

 Time for MAP call:         0.0953174017

 Time to unpack results and send to output file:         0.0105444981

 Time to free the MAP:         1.0070488086

 Time to free the data arrays:         0.0000030914

 Total Time:        1.6144599840

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0020728372

 Time to allocate the data caches for the MAP:         0.0000852904

 Time to pack the data for transfer to MAP:         0.0000257185

 Time for MAP allocation:         0.4919418612

 Time for MAP call:         0.0954098454

 Time to unpack results and send to output file:         0.0068804305

 Time to free the MAP:         1.0104683523

 Time to free the data arrays:         0.0000023058

 Total Time:        1.6068866414

 

 Number of input samples: 2048

 Time for disk access of input data:         0.0021133893

 Time to allocate the data caches for the MAP:         0.0000849740

 Time to pack the data for transfer to MAP:         0.0000285832

 Time for MAP allocation:         0.4930983108

 Time for MAP call:         0.0954848376

 Time to unpack results and send to output file:         0.0062486998

 Time to free the MAP:         1.0110700803

 Time to free the data arrays:         0.0000022221

 Total Time:        1.6081310970

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0041286317

 Time to allocate the data caches for the MAP:         0.0001437666

 Time to pack the data for transfer to MAP:         0.0000585493

 Time for MAP allocation:         0.4954247756

 Time for MAP call:         0.0955972745

 Time to unpack results and send to output file:         0.0259434406

 Time to free the MAP:         1.0112731553

 Time to free the data arrays:         0.0000030706

 Total Time:        1.6325726642

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0040092156

 Time to allocate the data caches for the MAP:         0.0001398199

 Time to pack the data for transfer to MAP:         0.0000514620

 Time for MAP allocation:         0.4975324599

 Time for MAP call:         0.0954322395

 Time to unpack results and send to output file:         0.0233116315

 Time to free the MAP:         1.0040274797

 Time to free the data arrays:         0.0000026593

 Total Time:        1.6245069675

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0040872348

 Time to allocate the data caches for the MAP:         0.0001428754

 Time to pack the data for transfer to MAP:         0.0000553789

 Time for MAP allocation:         0.4967817271

 Time for MAP call:         0.0955899776

 Time to unpack results and send to output file:         0.0257352331

 Time to free the MAP:         1.0714818227

 Time to free the data arrays:         0.0000028340

 Total Time:        1.6938770836

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0039433069

 Time to allocate the data caches for the MAP:         0.0001456440

 Time to pack the data for transfer to MAP:         0.0000531076

 Time for MAP allocation:         0.4920668359

 Time for MAP call:         0.0954174063

 Time to unpack results and send to output file:         0.0132923989

 Time to free the MAP:         1.0140847799

 Time to free the data arrays:         0.0000020616

 Total Time:        1.6190055412

 

 Number of input samples: 4096

 Time for disk access of input data:         0.0040483302

 Time to allocate the data caches for the MAP:         0.0001399592

 Time to pack the data for transfer to MAP:         0.0000515600

 Time for MAP allocation:         0.4955137562

 Time for MAP call:         0.0955982593

 Time to unpack results and send to output file:         0.0123663587

 Time to free the MAP:         1.0148421464

 Time to free the data arrays:         0.0000026978

 Total Time:        1.6225630678

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0077989027

 Time to allocate the data caches for the MAP:         0.0002865776

 Time to pack the data for transfer to MAP:         0.0001245712

 Time for MAP allocation:         0.5199869140

 Time for MAP call:         0.0956811855

 Time to unpack results and send to output file:         0.0385707143

 Time to free the MAP:         1.0385477726

 Time to free the data arrays:         0.0000022765

 Total Time:        1.7009989144

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0078888200

 Time to allocate the data caches for the MAP:         0.0002810814

 Time to pack the data for transfer to MAP:         0.0001630867

 Time for MAP allocation:         0.4973255372

 Time for MAP call:         0.0958328539

 Time to unpack results and send to output file:         0.0324521525

 Time to free the MAP:         1.0046402757

 Time to free the data arrays:         0.0000024257

 Total Time:        1.6385862331

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0078551862

 Time to allocate the data caches for the MAP:         0.0002660377

 Time to pack the data for transfer to MAP:         0.0001088702

 Time for MAP allocation:         0.4998020010

 Time for MAP call:         0.0959186898

 Time to unpack results and send to output file:         0.0239647356

 Time to free the MAP:         1.0129227729

 Time to free the data arrays:         0.0000024434

 Total Time:        1.6408407369

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0078917295

 Time to allocate the data caches for the MAP:         0.0002708327

 Time to pack the data for transfer to MAP:         0.0001048840

 Time for MAP allocation:         0.5045461802

 Time for MAP call:         0.0959798262

 Time to unpack results and send to output file:         0.0410247645

 Time to free the MAP:         1.0057902856

 Time to free the data arrays:         0.0000023821

 Total Time:        1.6556108848

 

 Number of input samples: 8192

 Time for disk access of input data:         0.0078649139

 Time to allocate the data caches for the MAP:         0.0002770872

 Time to pack the data for transfer to MAP:         0.0001259807

 Time for MAP allocation:         0.4938509799

 Time for MAP call:         0.0959471637

 Time to unpack results and send to output file:         0.0240077104

 Time to free the MAP:         1.0128799441

 Time to free the data arrays:         0.0000028984

 Total Time:        1.6349566783

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155421230

 Time to allocate the data caches for the MAP:         0.0005993886

 Time to pack the data for transfer to MAP:         0.0003554486

 Time for MAP allocation:         0.4894375576

 Time for MAP call:         0.0962487848

 Time to unpack results and send to output file:         0.1030592731

 Time to free the MAP:         1.0334886437

 Time to free the data arrays:         0.0001766781

 Total Time:        1.7389078975

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0154155195

 Time to allocate the data caches for the MAP:         0.0005926922

 Time to pack the data for transfer to MAP:         0.0003583931

 Time for MAP allocation:         0.4990906480

 Time for MAP call:         0.0961697096

 Time to unpack results and send to output file:         0.0582251388

 Time to free the MAP:         1.0183648940

 Time to free the data arrays:         0.0001120164

 Total Time:        1.6883290117

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0156160039

 Time to allocate the data caches for the MAP:         0.0005989745

 Time to pack the data for transfer to MAP:         0.0003564079

 Time for MAP allocation:         0.5184562097

 Time for MAP call:         0.0980435094

 Time to unpack results and send to output file:         0.0478798313

 Time to free the MAP:         1.0160736247

 Time to free the data arrays:         0.0001583343

 Total Time:        1.6971828957

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155411824

 Time to allocate the data caches for the MAP:         0.0006077267

 Time to pack the data for transfer to MAP:         0.0003589057

 Time for MAP allocation:         0.4986654424

 Time for MAP call:         0.0963339464

 Time to unpack results and send to output file:         0.0625862712

 Time to free the MAP:         1.0138911764

 Time to free the data arrays:         0.0001745283

 Total Time:        1.6881591794

 

 Number of input samples: 16384

 Time for disk access of input data:         0.0155611457

 Time to allocate the data caches for the MAP:         0.0005928461

 Time to pack the data for transfer to MAP:         0.0003526231

 Time for MAP allocation:         0.4921433234

 Time for MAP call:         0.0966133912

 Time to unpack results and send to output file:         0.0473099111

 Time to free the MAP:         1.0188806449

 Time to free the data arrays:         0.0001699489

 Total Time:        1.6716238344

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0305801886

 Time to allocate the data caches for the MAP:         0.0013753751

 Time to pack the data for transfer to MAP:         0.0010333290

 Time for MAP allocation:         0.6399719083

 Time for MAP call:         0.0977658271

 Time to unpack results and send to output file:         0.1151252073

 Time to free the MAP:         1.0399248043

 Time to free the data arrays:         0.0002349405

 Total Time:        1.9260115802

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0309985005

 Time to allocate the data caches for the MAP:         0.0013907857

 Time to pack the data for transfer to MAP:         0.0010103822

 Time for MAP allocation:         0.4927616103

 Time for MAP call:         0.0973624311

 Time to unpack results and send to output file:         0.1045864583

 Time to free the MAP:         1.0308288140

 Time to free the data arrays:         0.0002464600

 Total Time:        1.7591854421

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0307528558

 Time to allocate the data caches for the MAP:         0.0013379504

 Time to pack the data for transfer to MAP:         0.0010449582

 Time for MAP allocation:         0.4972783557

 Time for MAP call:         0.0985119821

 Time to unpack results and send to output file:         0.1036857284

 Time to free the MAP:         1.0205836866

 Time to free the data arrays:         0.0002517653

 Total Time:        1.7534472824

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0311350636

 Time to allocate the data caches for the MAP:         0.0013845361

 Time to pack the data for transfer to MAP:         0.0010248773

 Time for MAP allocation:         0.6062456240

 Time for MAP call:         0.0979899403

 Time to unpack results and send to output file:         0.1772841565

 Time to free the MAP:         1.0072547901

 Time to free the data arrays:         0.0002340425

 Total Time:        1.9225530304

 

 Number of input samples: 32768

 Time for disk access of input data:         0.0312342257

 Time to allocate the data caches for the MAP:         0.0013411373

 Time to pack the data for transfer to MAP:         0.0010182586

 Time for MAP allocation:         0.4941560563

 Time for MAP call:         0.0979463390

 Time to unpack results and send to output file:         0.1154044701

 Time to free the MAP:         1.0291770576

 Time to free the data arrays:         0.0002302006

 Total Time:        1.7705077452

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0619819094

 Time to allocate the data caches for the MAP:         0.0028867738

 Time to pack the data for transfer to MAP:         0.0022826914

 Time for MAP allocation:         0.4909542203

 Time for MAP call:         0.1001664262

 Time to unpack results and send to output file:         0.3238221848

 Time to free the MAP:         1.0184946017

 Time to free the data arrays:         0.0003667762

 Total Time:        2.0009555838

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0613183361

 Time to allocate the data caches for the MAP:         0.0029186870

 Time to pack the data for transfer to MAP:         0.0022967600

 Time for MAP allocation:         0.4979350021

 Time for MAP call:         0.1002508742

 Time to unpack results and send to output file:         0.3038552446

 Time to free the MAP:         1.0084211059

 Time to free the data arrays:         0.0003777505

 Total Time:        1.9773737604

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0619603549

 Time to allocate the data caches for the MAP:         0.0029699697

 Time to pack the data for transfer to MAP:         0.0022874515

 Time for MAP allocation:         0.4941593708

 Time for MAP call:         0.1001699715

 Time to unpack results and send to output file:         0.2493358223

 Time to free the MAP:         1.0030378125

 Time to free the data arrays:         0.0003590053

 Total Time:        1.9142797585

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0624503982

 Time to allocate the data caches for the MAP:         0.0028927092

 Time to pack the data for transfer to MAP:         0.0023155682

 Time for MAP allocation:         0.4956161374

 Time for MAP call:         0.0997216152

 Time to unpack results and send to output file:         0.3335405260

 Time to free the MAP:         1.0092602368

 Time to free the data arrays:         0.0003718432

 Total Time:        2.0061690343

 

 Number of input samples: 65536

 Time for disk access of input data:         0.0613071923

 Time to allocate the data caches for the MAP:         0.0028831872

 Time to pack the data for transfer to MAP:         0.0022927550

 Time for MAP allocation:         0.4827490773

 Time for MAP call:         0.1000048603

 Time to unpack results and send to output file:         0.3941077300

 Time to free the MAP:         1.0084010929

 Time to free the data arrays:         0.0003702589

 Total Time:        2.0521161541

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1239265995

 Time to allocate the data caches for the MAP:         0.0060943442

 Time to pack the data for transfer to MAP:         0.0046716118

 Time for MAP allocation:         0.4909738728

 Time for MAP call:         0.1049097961

 Time to unpack results and send to output file:         0.5572715029

 Time to free the MAP:         1.0403491277

 Time to free the data arrays:         0.0006494140

 Total Time:        2.3288462691

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1235989183

 Time to allocate the data caches for the MAP:         0.0060163776

 Time to pack the data for transfer to MAP:         0.0046410578

 Time for MAP allocation:         0.4886714431

 Time for MAP call:         0.1046465805

 Time to unpack results and send to output file:         0.5119309083

 Time to free the MAP:         1.0061097935

 Time to free the data arrays:         0.0006549297

 Total Time:        2.2462700089

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1243716772

 Time to allocate the data caches for the MAP:         0.0060502497

 Time to pack the data for transfer to MAP:         0.0046406196

 Time for MAP allocation:         0.4967928520

 Time for MAP call:         0.1046720094

 Time to unpack results and send to output file:         0.6418042852

 Time to free the MAP:         1.0060424871

 Time to free the data arrays:         0.0006266935

 Total Time:        2.3850008736

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1224812656

 Time to allocate the data caches for the MAP:         0.0061426214

 Time to pack the data for transfer to MAP:         0.0046714807

 Time for MAP allocation:         0.5197407383

 Time for MAP call:         0.1042879736

 Time to unpack results and send to output file:         0.5717088007

 Time to free the MAP:         1.0765193513

 Time to free the data arrays:         0.0006220062

 Total Time:        2.4061742377

 

 Number of input samples: 131072

 Time for disk access of input data:         0.1224911162

 Time to allocate the data caches for the MAP:         0.0060733447

 Time to pack the data for transfer to MAP:         0.0046558130

 Time for MAP allocation:         0.4914359615

 Time for MAP call:         0.1069204421

 Time to unpack results and send to output file:         0.7298962081

 Time to free the MAP:         1.1353171217

 Time to free the data arrays:         0.0006267331

 Total Time:        2.5974167404

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2470048466

 Time to allocate the data caches for the MAP:         0.0122710065

 Time to pack the data for transfer to MAP:         0.0092917531

 Time for MAP allocation:         0.5085595195

 Time for MAP call:         0.1141109703

 Time to unpack results and send to output file:         1.0766836575

 Time to free the MAP:         1.0116214911

 Time to free the data arrays:         0.0012484642

 Total Time:        2.9807917088

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2478050073

 Time to allocate the data caches for the MAP:         0.0124093166

 Time to pack the data for transfer to MAP:         0.0094071170

 Time for MAP allocation:         0.4847223531

 Time for MAP call:         0.1139799921

 Time to unpack results and send to output file:         1.2761705657

 Time to free the MAP:         1.0123640645

 Time to free the data arrays:         0.0012396127

 Total Time:        3.1580980289

 

 Number of input samples: 262144

 Time for disk access of input data:         0.2478762711

 Time to allocate the data caches for the MAP:         0.0123223121

 Time to pack the data for transfer to MAP:         0.0093650365

 Time for MAP allocation:         0.4848705507

 Time for MAP call:         0.1140386086

 Time to unpack results and send to output file:         1.2769517854

 Time to free the MAP:         1.0100668372

 Time to free the data arrays:         0.0012023739

 Total Time:        3.1566937755